\section*{List of Acronyms}
\begin{acronym}
	\acro{ASIC}{Application Specific Integrated Circuit}
	\acro{AVX-512}{Intel Advanced Vector Extensions 512-bit}
	\acro{CPU}{Central Processing Unit}
	\acro{DCT}{Discrete Cosine Transform}
	\acro{DSP}{Digital Signal Processors}
	\acro{DAXPY}{Double-Precision aX Plus Y ($aX+Y$)}
	\acro{FFT}{Fast Fourier Transform}
	\acro{IA-32}{Intel Architecture 32-bit or i386}
	\acro{ISA}{Instruction Set Architecture}
	\acro{MMX}{Intel's first SIMD implementation}
	\acro{RVV}{RISC-V Vector extension}
	\acro{SIMD}{Single Instruction Multiple Data}
	\acro{SWAR}{SIMD Within A Register (see Flynn's Taxonomy)}
	\acro{SV}{(Scalable) Simple Vectorisation or Simple-V}
	\acro{SVE2}{ARM Scalable Vector Extension version two}
	\acro{SVP64}{Simple-V with Prefixing of Power ISA, 64-bits in length}
	\acro{VLIW}{Very Long Instruction Word}
	\acro{VSX}{128-bit Packed SIMD Extension to the Power ISA}
\end{acronym}
