| openpowerbot | [mattermost] <lkcl> ben: tell me about it. at the moment however my priority is "get something working at all" then things like performance can be added in the usual incremental fashion. | 09:45 |
|---|---|---|
| openpowerbot | [mattermost] <lkcl> wishbone does actually have burst-mode, and pipelining does achieve performance | 12:20 |
| openpowerbot | [mattermost] <lkcl> therefore it's not _actually_ microwatt's "fault" [if the various peripherals and peripheral fabric aren't correspondingly up to scratch] | 12:21 |
| openpowerbot | [mattermost] <lkcl> correction: cores and core fabric, where "core" is, in the VLSI-industry-standard-naming-convention "a peripheral or a memory controller" | 12:22 |
| openpowerbot | [mattermost] <lkcl> wishbone peripherals tend to be slow anyway so are not a high priority. | 12:22 |
| openpowerbot | [mattermost] <lkcl> SRAM, DDR3, NAND, HyperRAM, these are termed "cores" (but not peripherals) and those _had_ better be fast [support wishbone pipelining] | 12:23 |
| openpowerbot | [mattermost] <lkcl> the problem is, as i found out with nmigen-soc, the mistake has been made that such "support" is *not* WB4-pipeline-mode-compliant. | 12:24 |
| openpowerbot | [mattermost] <lkcl> this isn't microwatt's problem | 12:24 |
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