Tuesday, 2022-04-26

openpowerbot[slack] <Paul Mackerras> lkcl, looks like that kernel you're trying to boot may not have radix support compiled in05:51
openpowerbot[slack] <Paul Mackerras> lkcl, looks like that kernel you're trying to boot may not have radix MMU support compiled in05:51
openpowerbot[slack] <Paul Mackerras> @lkcl: also, I looked in the divider and I don't see a 128-bit adder/subtracter, only a 64-bit one. Where exactly are we getting these long carry chains?05:52
openpowerbot[slack] <Paul Mackerras> @lkcl: I looked in the divider and I don't see a 128-bit adder/subtracter, only a 64-bit one. Where exactly are we getting these long carry chains?05:53
openpowerbot[mattermost] <lkcl> in any add, subtract, or compare, over 96-bits in length09:43
openpowerbot[mattermost] <lkcl> more than 23-25 CARRY4 blocks, created by the yosys xilinx arithmetic techmap09:46
openpowerbot[mattermost] <lkcl> https://github.com/YosysHQ/yosys/blob/master/techlibs/xilinx/arith_map.v#L17509:47
openpowerbot[mattermost] <lkcl> if microwatt really doesn't have any [long add/sub/cmp chains) then that's great09:48
openpowerbot[mattermost] <lkcl> if dend(128) = '1' or unsigned(dend(127 downto 64)) >= div then09:51
openpowerbot[mattermost] <lkcl> yep that's 64-bit09:51
openpowerbot[mattermost] <lkcl> ah, i think i found one, not in divide, but in multiply09:55
openpowerbot[mattermost] <lkcl> https://github.com/antonblanchard/microwatt/blob/master/multiply.vhdl#L6109:55
openpowerbot[mattermost] <lkcl> v.multiply_pipeline(0).data := (unsigned(m.data1) * unsigned(m.data2)) + unsigned(m.addend);09:55
openpowerbot[mattermost] <lkcl> addend is 128-bit (in xilinx_mult.vhdl)09:56
* openpowerbot [mattermost] <lkcl> looking at xilinx_mult.vhdl...09:59
openpowerbot[mattermost] <lkcl> interesting!09:59
openpowerbot[mattermost] <lkcl> it seems to be breaking down the addend into smaller sections that are [manually] put into the DSP blocks09:59
openpowerbot[mattermost] <lkcl> one simple way to test it: don't use the -nocarrylut option.  if nextpnr-xilinx locks up, you needed to have used -nocarrylut :)10:34
openpowerbot[mattermost] <lkcl> fpu.vhdl uses one of those multiply pipeline blocks... yeah it all looks good10:49

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