| *** lkcl <lkcl!lkcl@freebnc.bnc4you.xyz> has joined #microwatt | 00:04 | |
| openpowerbot | [slack] <Anton Blanchard> lkcl: The output still strips a lot of useful information unfortunately. We need to work with Tristan to improve that (he did preserve signals on interfaces a while ago which was a helpful first step) | 02:27 |
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| openpowerbot | [slack] <Anton Blanchard> wrt VSS/VDD, I need to better understand what openlane does. It does seem pretty silly to have to manually insert it into the hierarchy | 02:28 |
| openpowerbot | [mattermost] <lkcl> Anton: yeah it's down to the assumption that at a high-level (verilog, vhdl) having power/ground is a waste of space in the HDL source code | 18:30 |
| openpowerbot | [mattermost] <lkcl> but actual cell library definitions? those definitely need them | 18:30 |
| openpowerbot | [mattermost] <lkcl> openlane is, as you're likely finding, held together with duct-tape :) | 18:33 |
| openpowerbot | [mattermost] <lkcl> whereas coriolis2 is primarily entirely developed long-term by one person (Jean-Paul Chaput), and is, as a result, much more integrated and well-thought-out | 18:34 |
| openpowerbot | [mattermost] <lkcl> that said he could seeeeriously use some help | 18:34 |
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