openpowerbot | [mattermost] <lkcl> boris: briefly, that's a long story, the "preference" in IBM's case has always been FSI (etc.) never JTAG. | 00:20 |
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openpowerbot | [mattermost] <lkcl> there was however, 15+ years ago, a 32-bit embedded PowerPC product that used JTAG, and there was a patch i saw somewhere on the openocd mailing lists that added "powerpc32" as a target | 00:21 |
openpowerbot | [mattermost] <lkcl> ti was never accepted upstream | 00:21 |
openpowerbot | [mattermost] <lkcl> openocd is therefore entirely missing Power ISA targets... simply because *there aren't any* | 00:22 |
openpowerbot | [mattermost] <lkcl> until microwatt and libre-soc | 00:22 |
openpowerbot | [mattermost] <lkcl> if you're interested and are based in the EU and are planning to do something that completes before about Oct 1st i can probably justify throwing some budget from NGI POINTER your way to sort out openocd | 00:25 |
openpowerbot | [mattermost] <lkcl> more tomorrow as it's v. late here | 00:25 |
openpowerbot | [slack] <Boris Shingarov> Yeah, I know -- the only way was through the closed firmware inside probes like the BDI2000. But that's for IBM/AMCC/whatever, here I am talking specifically about microwatt / libre-soc and the `core_debug.vhdl` circuit and its software counterpart `mw_debug.c`. I asked the question because I don't want to duplicate effort. | 00:30 |
openpowerbot | [slack] <Boris Shingarov> > throwing some budget from NGI POINTER | 00:36 |
openpowerbot | [slack] <Boris Shingarov> It's not about budget, the way how it works in my project here, is there are many things not directly related to what I am doing (a formally verified compiler) but without them I am blocked, and when those things are broken, I simply have no other way than to fix them. For example this is what happened with 64-bit POWER in gem5. So the real question is, whether someone else is already looking at op | 00:36 |
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openpowerbot | [mattermost] <lkcl> boris: as an aside, you may be interested to know that we got smt2 IEEE754 FP formal correctness support upstreamed in yosys and SymbiYosys | 02:38 |
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openpowerbot | [mattermost] <lkcl> and have an IEEE754 Formal Correctness proof for Libre-SOC's fadd, fsub, fmul and fma. in varying bit-widths because the time required to run anything involving multiply as the bitwidth increases is completely insane. | 02:39 |
openpowerbot | [mattermost] <lkcl> https://git.libre-soc.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/fpfma/test/test_fma_formal.py;hb=HEAD | 02:40 |
openpowerbot | [slack] <joel> @Boris Shingarov I started doing a gdb backend a while back. I'll see if I can find the code, although perhaps using openocd would result in less duplication | 04:19 |
openpowerbot | [slack] <joel> I think I got it dumping registers but not memory | 04:19 |
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