| openpowerbot | [slack] <Jeremy Kerr> @Boris Shingarov this (original issue) looked more like a problem with my debug environment, particularly the grounding on the USB host side. | 00:56 |
|---|---|---|
| openpowerbot | [slack] <Jeremy Kerr> but in in response to your questions - if you do a step, the NIA should advance and the next instruction executes; creset will reset the core state, and NIA back to the system reset vector; a subsequent start (or step) will begin executing from that point | 01:00 |
| openpowerbot | [slack] <Jeremy Kerr> but in in response to your questions - if you do a step, the NIA should advance and the next instruction executes; creset will reset the core state (including NIA back to the system reset vector); a subsequent start (or step) will begin executing from that point. | 01:01 |
| openpowerbot | [slack] <Boris Shingarov> > if you do a step, the NIA should advance and the next instruction executes | 01:33 |
| openpowerbot | [slack] <Boris Shingarov> Then something is not right, because this is what I would expect but is not what happens in my setup, even though the DMI itself seems to be perfectly fine. Are you saying core_step works for you? | 01:33 |
| openpowerbot | [slack] <Jeremy Kerr> I don't think I've tried step recently. What does happen in your setup? | 01:46 |
| openpowerbot | [slack] <Matt Johnston> @Boris Shingarov mw_debug step seems to work here on an arty with current master | 01:56 |
| openpowerbot | [slack] <Matt Johnston> @Boris Shingarov mw_debug step seems to work here on an arty with current master. that's after doing a `stop`. | 02:01 |
| openpowerbot | [slack] <Benjamin Herrenschmidt> `step` is a bit fragile and core changes regularly break it... | 06:03 |
| openpowerbot | [slack] <Boris Shingarov> Ok, just got myself convinced that `step` is indeed stepping in the current master. The actual problem is that I don't understand what causes `_start` in head.S at `0x00000000` (the `RESET_ADDRESS` in fetch1.vhdl) to be mapped to `0xff000000` (where it is in the flash). If I stop right after the memtest, peeking at what memory contents are where confirms the code for `_start` is at `0xff000000` and | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> ```$ mw mr ff000000 1 | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> 00000000ff000000: 4800002408000048 H...$..H``` | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> that's the endian-detect palindrome right there, | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> but | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> ```$ mw mr 0 1 | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> 0000000000000000: ffffffffffffffff ........``` | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> and of course `mw reset` and `mw start` doesn't get to run any code. | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> So... | 07:09 |
| openpowerbot | [slack] <Boris Shingarov> How does it jump to `ff000000` on normal power-on reset?? | 07:09 |
| openpowerbot | [slack] <Matt Johnston> I think that comes from `ALT_RESET_ADDRESS` which is used `core_alt_reset` is set? that gets cleared after the dram is initialised | 07:16 |
| openpowerbot | [slack] <Matt Johnston> I think that comes from `ALT_RESET_ADDRESS` which is used if `core_alt_reset` is set? that gets cleared after the dram is initialised | 07:16 |
| openpowerbot | [slack] <Boris Shingarov> Oh, now I see: | 07:46 |
| openpowerbot | [slack] <Boris Shingarov> ```core_alt_reset <= not init_done;``` | 07:46 |
| openpowerbot | [slack] <Boris Shingarov> in the litedram wrapper. | 07:46 |
| openpowerbot | [slack] <Boris Shingarov> And I guess `init_done` gets back to 0 when the external reset on the PCB is pulled. Makes sense. | 07:46 |
| openpowerbot | [slack] <Boris Shingarov> Thanks for the pointer! | 07:46 |
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| openpowerbot | [slack] <Benjamin Herrenschmidt> Yup, it's the 'magic firnware' for litedram:-) | 16:25 |
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