| openpowerbot | [slack] <mithro> @Benjamin Herrenschmidt We have quite a bit of experience with driving video systems in LiteX thanks to the video capture work we have done | 18:06 |
|---|---|---|
| openpowerbot | [slack] <Benjamin Herrenschmidt> Pushing pixels out doesn't seem particularly difficult. The interesting thing is how this made me think about DMAs and generally deficiency in our interconnect | 21:18 |
| openpowerbot | [slack] <Benjamin Herrenschmidt> Wishbone sucks... LiteX lack of pipelining support doesn't help but fundamentally wb's 'cyc' prevents pipelining requests from different masters | 21:19 |
| openpowerbot | [slack] <Benjamin Herrenschmidt> AXI solves all that but has a significantly higher resource cost | 21:20 |
| openpowerbot | [slack] <Benjamin Herrenschmidt> I'm toying with doing an in-between that brings full pipelining with request/response tagging and response handshake but a single request stream | 21:20 |
| openpowerbot | [slack] <Benjamin Herrenschmidt> I think it would be a nice fit for FPGAs | 21:21 |
| openpowerbot | [slack] <Benjamin Herrenschmidt> And easily adapted to a real axi or wb if needed | 21:21 |
| *** lkcl <lkcl!lkcl@freebnc.bnc4you.xyz> has quit IRC | 22:27 | |
Generated by irclog2html.py 2.17.1 by Marius Gedminas - find it at https://mg.pov.lt/irclog2html/!