Friday, 2021-01-01

programmerjake[mhappy new years/new years eve!03:20
mePy2[m]Happy new year!10:58
lkclhappy new year :)17:57
programmerjake[ma new year, new patents expire, x86_64+OpenPower CPU? :P18:25
programmerjake[mmaybe later...18:25
lkclmmm... x86 variable-length byte-level decoding, mmmm fuuun :)18:27
lkclmind you if we did what China ICT did with the Loongson G architecture (just implement the top 200 instructions)18:28
lkclwe'd end up, like them, with 70% performance under qemu JIT :)18:29
programmerjake[mi was thinking just x86 32-bit user mode (with just enough support for segment registers to support wine & linux) and 64-bit user mode with openpower kernel mode and boots in openpower mode18:31
programmerjake[mif we're depending on qemu, total-store-order memory ordering is probably sufficient -- what the apple m1 does iirc18:32
programmerjake[mno need to implement an x86 decoder if we're using qemu jit18:33
programmerjake[mno 16-bit, no v86 mode, no priveleged-only regs18:35
lkclmitch alsup showed me how to do TSO22:13
lkclis there a list somewhere of the opcodes you're thinking of?22:13
sorearloongson does not implement "opcodes", but you know that22:14
lkclsorear: i didn't - i'd heard the story of what ICT did, but don't know the full details22:15
lkcli have a vague recollection of someone telling me that they focussed on FP x8622:16
sorearit has a bunch of custom instructions in the MIPS encoding to make qemu faster22:17
lkclooer i am getting flashbacks to when i worked for CEDAR Audio.  had to do 80386 assembly-level programming :)22:17
lkclsorear: ahh thank you.22:17
lkclso that's how they did it.  interesting22:18
sorearmost importantly variants of arithmetic instructions that calculate x86 flags (including PF and AF) and a software-exposed CAM for mapping x86 program counters to translated program counters22:18
sorearvery curious how rosetta2 handles pf/af22:18
lkcloptional and mandatory prefixes of between 1-4 bytes?22:22
* lkcl cackles manically22:22
lkclsorear: thx22:25
lkclyowser.  "software simulation of the 6-bit EFlags with MIPS instructions requires *tens* of MIPS instructions"22:27
programmerjake[mif we wanted to have fast qemu x86 on openpower, we'd also want to support the f128 extension, since it has instructions for fast emulation of f8023:04
programmerjake[min particular: f80 alu ops can be emulated by doing a f128 op in round-to-odd mode, then a round to f80 instruction in the desired rounding mode23:06

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