| *** daveshah is now known as gatecat | 13:04 | |
| lkcl | cesar[m]1, i added the Mux needed for detecting the add-on of SVSTATE.srcstep into PowerDecoder2. it is not the best place but good enough for now | 13:47 |
|---|---|---|
| cesar[m]1 | Got it, thanks. I'll work on adding the VL hardware for loop to the FSM. | 13:59 |
| lkcl | watch out for ending early, which is when *none* of the outputs is vectorised | 14:03 |
| lkcl | probably what i will do there is add that as a Signal to PowerDecoder | 14:03 |
| cesar[m]1 | lkcl: On https://libre-soc.org/3d_gpu/architecture/dynamic_simd/, the sense of the P bit we are using is opposite of what you wrote. P=0 means no partition. | 17:48 |
| lkcl | doh :) | 19:58 |
| lkcl | i'll update the add page as well | 20:01 |
| lkcl | and the logicops page sigh | 20:03 |
| cesar[m]1 | lkcl: On the first line of https://libre-soc.org/openpower/sv/svp64/#index12h1 , it should read RM[10:18] instead of RM[8:18], right? | 22:28 |
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