Sunday, 2021-08-01

ghostmansd-pcHi Luke, I recall that we discussed we might create the documentation for adding a new instruction, based on task 656. What I don't recall is whether we created a ticket in bugzilla, though. Should I raise it, or we have something ready?08:11
ghostmansd-pcI also remember that I haven't completed firststeps guide yet, so I'll complete that one next week.08:11
ghostmansd-pcSo I actually think of this sequence next week: 1) complete firststeps doc; 2) complete first-instruction doc; 3) move to tests.08:12
ghostmansd-pcDoes this schedule work for you? Please, let me know, if these must be done in other way round.08:13
lkclno not created yet09:55
lkcldo go ahead09:56
lkclcross-link using "see also" field (otherwise bugs are isolated and a pain to find)09:56
programmerjakeaddg6s is used for doing a BCD addition, like x86's daa instruction:
programmerjakeafaict to do a bcd add of a and b, you do `add r, a, b` then `addg6s t, a, b` then `add r, r, t`10:15
programmerjakeI just discovered x86 has something kinda like SV's 128 registers:
programmerjaketakes 4 512-bit registers in sequence and does fmas10:21
lkclthe actual difference between AVX-512, SVE2 and Cray-style Vector ISAs is, sadly, one instruction: setvl.10:24
lkclif x86 and ARM added *one instruction*, setvl, which took VL and created a hidden predicate mask ((1<<VL)-1), they'd *have* Cray-style Vectors10:24
lkclbecause they already have predicate masks it's a no-brainer at the hardware level10:25
lkclthat hidden mask gets ANDed with any explicitly-given predicate mask arguments (if any) and err... that's it.10:25
lkclghostmansd, i've an idea of a [boring, mundane] task for you that will need you to go over every single line of the pseudocode of every single instruction, if you're interested10:26
programmerjakeyeah, though I was referring more to the using-a-sequence-of-consecutive-registers that SV is using10:27
ghostmansdWould you like to re-check these?10:27
lkcli could do it - very quickly - but i feel that it would be advantageous for you to actually have to do a "line-by-line read" of every single instruction's pseudocode, paying attention to all of them and doing a simple(ish) adaptation10:28
lkclprogrammerjake: am just waking up :)10:28
lkclprogrammerjake, can you drop that insight about add6gs into #656?10:28
lkclghostmansd: recheck "these"? what is "these"? sorry, no context there10:29
lkcl(will continue explaining about the runthrough of all pseudocode)10:32
lkclwe are doing a Vector ISA, where the "Vector context" can specify an over-ride on the source and destination register width.10:32
lkcl"add RT, RA, RB" says "add the 64 bit registers RA and RB and put it into the 64 bit RT register"10:33
lkcl"sv.add/sw=16/ew=8 RT, RA, RB" says, "take only 16 bits of RA and RB, add as 16 bits, then truncate to 8 and place ONLY 8 BITS into RT"10:34
lkcl(that example is much more meaningful the other way round, or when "Saturation" mode is enabled)10:34
lkclall the pseudocode assumes [0:63]10:34
lkclnot: [0:SOURCE_REGISTER_LENGTH-1]10:35
programmerjakewell, have fun everyone, I'm off to sleep10:35
lkclwe need to go over eeeeevvvverryyyyy single frickin line of the pseudocode, changing pretty much 100% of them to remove all hard-coded [0:63] and replacing them10:35
lkcleek, you're up at night! :)10:36
lkclnight jacob10:36
lkclnow, whilst it sounds "by rote", it's actually an opportunity for you to go sequentially through the pseudocode, and by doing a (relatively simple) task on each of them, you will become familiar _with_ every single one of the instructions.10:37
programmerjakenote that global search/replace will likely make mistakes, hence the need to go over it by hand10:39
ghostmansdI mean if you want me to compare each and every instruction with ISA docs10:39
lkclghostmansd: no, i don't mean thatm because we've spent 18+ months writing unit tests that tell us that the pseudocode is correct.11:49
lkclwe need to *modify* the pseudocode - and later submit the element-width changes upstream to the ISA WG - to allow the width of all pseudocode operations to be DYNAMICALLY specified... at runtime.11:50
lkclexample, here:11:52
lkclRA <- (RS) | ([0]*48 || UI)11:52
lkclneeds to be changed to:11:52
lkclRA <- (RS) | ([0]*(SOURCE_REGISTER_WIDTH-16) || UI)11:53
lkclor, more accurately11:53
lkclRA <- (RS) | ([0]*MAX(0,(SOURCE_REGISTER_WIDTH-16)) || UI)11:53
lkclbecause the source width and destination width we are permitting - in SVP64 - to be OVER-RIDDEN AT RUNTIME11:54
lkcls <- (RS)[56]11:55
lkcls <- (RS)[SOURCE_REGISTER_WIDTH-8]11:56
lkclor, more accurately:11:56
lkclif SOURCE_REGISTER_WIDTH == 8 then11:56
lkcl     RT <- RS11:56
lkcl      ...11:56
lkcl       ...11:56
lkcl        ....11:56
lkclRA[56:63] <- (RS)[56:63]11:58
lkcldo while n < SOURCE_REGISTER_WIDTH11:58
lkclinstead of11:58
lkcldo while n < 6411:58
lkclevery operation gets REDESIGNED to be DYNAMICALLY capable of ALL registers being 8, 16, 32 or 64 bit12:00
lkclhowever the whole purpose of inviting you to do this task is so that you *have* to go over every single one of the instructions.12:04
lkclconsequently you will become familiar with them all, in a "fingers typing at keys" way.12:05
lkclwhereas if you just "read the spec and compare the words", this is nowhere near as effective, you will get brain-fuzz within 10 minutes, from going over 200+ pages of staring at screens without actually doing any actual "activity" :)12:06
lkclghostmansd, however, important to say: there is no rush on that.15:55
ghostmansdlkcl: Ok, I think I got the idea. Could you, please, raise the relevant task and post a summary there?16:17
ghostmansdI will take a look at it, with a low priority.16:17
ghostmansdThank you!16:17
lkcli think there might be one already, it's been planned for several months16:17
ghostmansdI'm just wondering, how SOURCE_REGISTER_WIDTH is changed? You said it's runtime property, but what's the actual way?16:35
ghostmansdI mean, other ISAs I've been looking at have different instructions depending on register width.16:35
ghostmansdThe mnemonics might be the same (even this depends on assembly syntax, though), but opcodes are different.16:36
ghostmansdAh, ok, I messed sv.add/sw=1y/ew=816:37
jnbtw, i'm making another attempt at cleaning up the unit tests. WIP here:
lkcljn: if you'd like to help i'd much rather you used rather than an external non-audited repository.18:14
lkclwe are under Audit Conditions for both protection against patent trolls and also from NLnet's Privacy and Enhanced Trust Programme18:15
jnshould i push my commits on git.l-s.o when i'm reasonably sure they're good? (which is roughly now)18:15
jnin other development communities there's the option of pushing code somewhere, where it will be seen bit isn't directly on the master branch, and i'm very used to it, so i'm still figuring the libre-soc workflow out18:16
lkclnow we have to discuss them, it's a problem, because in the future, when someone comes along and audits these IRC discussions, they will see, "err where is this source code? gitlab is no longer operational / gitlab had a DMCA takedown notice / gitlab was taken over by a proprietary company and the source is no longer available"18:17
jnoh, i see18:17
jni'll avoid starting discussions about externally hosted code18:18
lkclso, can you send me an ssh public key, i'll add you to the repo.  you've been around long enough, i assume you're happy with the Charter?
jnwe've already done the ssh key thing; i'll re-read the charter, in case i forgot part of it18:20
lkclah ok great.18:20
lkclthen i'll add you to the soc repo.18:20
lkclwe don't use relative imports btw18:20
lkcland nothing in "unused" matters, does not need time spent on it18:20
lkclsigh, i can't discuss the changes that _do_ matter because i can't refer to an external source code repository.18:21
lkcljn: ah, cool, you're already added18:22
lkclyou can check with "ssh"18:22
lkclDO NOT type a password if that fails.18:22
lkclfail2ban will instantly ban you when it notices a failed password entry in /var/log/auth.log18:23
programmerjakeport 922, not 2218:23
lkcl(there are that many attempts to break in to over ssh)18:23
lkclyes, port 922.  it's in HDL_workflow, how to edit ~/.ssh/config18:23
jnmy gitolite setup works, all good18:23
lkcljn: if you create a temporary branch (i hate branches) we can do a review and cherry-pick18:24
jnok, good, will do.18:24
lkclso, summary:18:24
lkcl1) create temporary branch18:24
programmerjakeor, do what I do and change all git remotes to ssh:// or similar18:24
lkcl2) don't use relative imports18:24
lkcl3) anything in "unused" can be ignored completely.  it's 3-year-old code, there only for reference18:25
jntemporary branch:;a=shortlog;h=refs/heads/jn-tests18:26
lkcl4) unit tests that fail, leaving them *as* failed, is "good" rather than "bad"18:26
lkclno diffs found there (?)18:27
lkcldrop that one. unnecessary.  it's "unused" for a reason, as in "we aren't going to use it, so running it is not important, and it's never going to be installed in any package / distribution"18:28
jnoops, the empty commit is probably because i got distracted18:29
lkclgood idea18:29
jnthe issue with the unused dir is that the tests are still run and make noises18:29
lkclright, this one is important *not* to skip these.18:29
lkcltests that fail are GOOD.18:29
lkclstopping them from running is a SERIOUS problem.... because then we think, "oh look, everything passes, we can ship the code"18:30
lkcland spend USD 6 million on Foundry Masks only to find afterwards, when they don't work, that a unit test which showed some code failed had been SKIPPED.18:30
jni'd prefer to use a test decorator that says "this one is known to fail sometimes, still run it but don't act surprised". but i haven't seen one like it in the unittest library18:30
lkclyehyeh, me neither.  i think it's just "against the grain".18:31
lkcli.e. unit tests that fail is not a problem, because the catching of the exception (and reporting it) does not prevent *other* unit tests from failing.18:31
lkclno.  we don't use relative imports.  they are an absolute nuisance.18:32
jnok, so the right thing would a full-path import?18:32
lkclwe run with "python3 develop" and then use full imports, which work from *any* position in the chain.18:32
lkclwell, i'm surprised it's not using the local directory18:33
lkclas in: it's always been my understanding that python looks, as a first priority, in the same directory as the file with the "import" statement in it.18:33
lkclbut, it's "unused" so it's not relevant anyway18:34
lkclwhat on earth is that doing in "unused"???18:34
lkclthat shouldn't be there *at all*18:34
lkclcould you check to see if that's a copy of openpower-isa/decoder/simulator/
lkclit looks like it's a much older version, so should actually be deleted18:36
jnthe move happened in;a=commitdiff;h=32a529f4e7558a4da2d6d510b3be004be7ffa72d18:37
lkclngggh :)18:38
lkclit's a copy of the qemu, i'll delete it18:38
lkclok so there's some great stuff here.18:40
lkcldoes anyone know how to do cherry-pick with preserving commit attribution?18:40
lkclor is that automatic?18:40
jnAFAIK cherry-pick will automatically preserve the Author field and set the Committer field to your identity18:41
jnmany of the remaining failing tests (which i didn't address) run into a timeout18:42
lkclyes, that sounds about right. some of them are very long.  some will genuinely be timing out.18:42
jnto name some examples: soc.experiment.test.test_dcbz_pi.test_dcbz_addr_zero, soc.experiment.test.test_compalu_multi.test_compunit, test_div_pipe_core (soc.fu.div.test.test_pipe_ilang.TestPipeIlang)18:43
lkcldcbz we expect18:43
lkcldiv one is just looooong18:43
lkclilang might be just also taking a long time18:44
jnthe timeout is currently 2 minutes per test18:44
lkclfor DIV tests that may not be long enough18:44
lkclok all good. cherry-picked and pushed18:47
jnin some cases, e.g. soc.experiment.test.test_ldst_pi_misalign.test_misalign_mmu it doesn't look like a long test, so i'm wondering if they're hitting a pathological case for performance18:48
jnalrightm thanks!18:48
lkcljn: more likely, just breaking.18:49
lkclthat's raising an exception, and we haven't added exceptions yet.18:50
jnah , i see18:50
lkcljn: good stuff. keep it coming :)19:17
cesarlkcl: I'd suggest creating a git tag on the hash that corresponds to the chip that was taped out.23:02

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