Wednesday, 2021-11-17

openpowerbot[irc] <lkcl> hmm bnc4you has gone offline, hmm11:34
openpowerbot[irc] <lkcl> <lkcl> octavius,
openpowerbot[irc] <lkcl> <lkcl> and;a=blob;f=src/soc/debug/test/;h=a72145754974946a705cb126d68064e5cf6ab5e1;hb=1f53e4120068723d0121dd40a006258bb0dc0179#l4811:35
lkclbnc4you is still out, luckily there is OFTC13:03
*** lkcl <lkcl!> has left #libre-soc13:04
openpowerbot[irc] <lkcl> cesar: i'm going to try allowing TestIssuer FSM to issue overlapping instructions16:32
openpowerbot[irc] <lkcl> but first, hm, i just realised, obviously, some read-port bitvector collation is needed, so that has to be done first16:32
programmerjakelkcl: pretty ascii art:
openpowerbot[irc] <lkcl> ooo pretty17:20
openpowerbot[irc] <lkcl> that's all covered by pmux, which is covered by use of Array() in one line of code17:20
programmerjakeyeah, i was distracted by building bitwise vectors and thinking about wether it can be simulated efficiently....Array would likely be simpler17:22
openpowerbot[irc] <lkcl> a lot.17:24
openpowerbot[irc] <lkcl> 4 lines of code instead of 30.17:24
programmerjakeotoh, the code I wrote can be trivially simd-ified...the pmux version can't as easily17:26
programmerjakecuz the inputs/outputs aren't decomposed to the bitwise level in my code17:26
openpowerbot[irc] <lkcl> yyeah Array is going to be a pig17:28
openpowerbot[irc] <lkcl> errr hang on... no it'd be fine.  each bit is completely independent17:28
openpowerbot[irc] <lkcl> just like in the OP_OR, OP_AND (etc.) operations17:29
openpowerbot[irc] <lkcl> SIMD is completely irrelevant because each bit is completely independent17:29
openpowerbot[irc] <lkcl> so it can go.17:29
openpowerbot[irc] <lkcl> 4 lines.17:29
openpowerbot[irc] <lkcl> BitwiseMux can be left there (it may be useful for other purposes, that's what nmutil is for)17:30
openpowerbot[irc] <lkcl> also the Repl() removed.  it's unnecessary complexity17:30
programmerjakenah, cuz the version using array would need to be rewritten to extract the underlying version needs no modification whatsoever for simd17:30
programmerjakeidk why you think the repl is extra's just splatting either 0 or 1 into the bitwise mux's input17:31
openpowerbot[irc] <lkcl> 4 lines of code vs 30 lines of code.17:32
openpowerbot[irc] <lkcl> please don't make me repeat it17:32
openpowerbot[irc] <lkcl> when the input lengths are all the same17:32
programmerjakei was going to have Mux(lut[i], -1, 0) instead of the repl17:32
openpowerbot[irc] <lkcl> and the output length is the same17:32
openpowerbot[irc] <lkcl> i don't understand what the Repl() is for because when Array() is used there is no need for it17:33
openpowerbot[irc] <lkcl> therefore, your question is invalid, because it's for code that needs to be removed and replaced17:33
openpowerbot[irc] <lkcl> with only 4 lines of code17:33
openpowerbot[irc] <lkcl> which i've said for the 5th time, now17:34
openpowerbot[irc] <lkcl> i'm trying to concentrate on some complex register hazard detection17:34
openpowerbot[irc] <lkcl> rrrr streeeess. data structures are barely understandable, so many signals17:48
openpowerbot[irc] <lkcl> i wrote the damn code and i'm barely coping, even with extensive code-comments17:52
openpowerbot[irc] <lkcl> okaaay.  horribly over-complex read-after-write bitvector hazard checking is done but not in use18:02
programmerjaketoshywoshy openpowerbot is not echoing my messages from oftc18:05
openpowerbot[irc] <lkcl> everything's displaying here so it's being picked up:
openpowerbot[irc] <lkcl> worth raising this evening at the meeting18:09
openpowerbot[irc] <lkcl> okaaay next phase: allow instruction overlaps in the FSM.  i'm making this an option (not enabled by default) so that the TestIssuer FSM normally operates entirely hazard-free18:15
octaviusOpenpower meeting in 3min, toshywoshy, programmerjake20:58
sadoon_albader[mMeeting tonight?21:37
programmerjakemeeting just ended...sorry22:01
programmerjakeunless your talking about a different meeting22:01
sadoon_albader[mI thought it was 10PM UTC?22:04
sadoon_albader[mThe libre-soc meeting22:05
programmerjakeumm...i'd have to double check...remember tz changed due to daylight savings. also, the wed meeting is 1hr before the tue meeting22:12
programmerjakethe wed meeting is at 21:00 utc, the tue meeting is 22:00 utc22:17
sadoon_albader[mI could swear last week wed was 10 UTC lol22:22
sadoon_albader[mI guess it could be daylight saving, we don't do that down here (we have enough daylight xD)22:22
sadoon_albader[mWow you're right, it was Wednesday for me because it's 1AM here UTC+322:23
sadoon_albader[mSo I got confused22:23
programmerjakeno daylight savings? makes me jealous22:24
sadoon_albader[mTrust me I'd take daylight savings over 50 celsius summers22:24
programmerjakedoes it really get that warm? pretty toasty22:26
sadoon_albader[mAnd it stays that way June through September22:26
sadoon_albader[mOur summer is almost 7-8 months22:26
programmerjakeabout the warmest it gets here is 43 C22:27
sadoon_albader[m43c is the May/October normal temp22:28
sadoon_albader[mOnce the first rain falls it comes down quick though, 22c right now22:29
programmerjakeat least it isn't that humid's kinda desert22:29
sadoon_albader[mFor us it's either humid (SE wind) or dry/dusty (N wind)22:30
programmerjakeit's currently 8 C here22:31
sadoon_albader[mI'd literally freeze heh22:32
programmerjakewhere I used to live it would sometimes get down to -26 C22:32

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