| lkcl | aw, doh, when compiling to verilog with an MMU it helps to actually pass the correct option inside issuer_verilog.py to actually create an MMU | 15:58 |
|---|---|---|
| lkcl | hoo that was scary: loadavg jumped to 420 when compiling with verilator | 16:37 |
| octavius | Hi, long time no chat. I'll start catching up on the bug emails today. Is there a meeting this evening? | 19:03 |
| programmerjake | yes, there is a meeting today | 19:10 |
| octavius | Nice | 19:15 |
| lkcl | meeting 10min | 21:48 |
| lkcl | toshywoshy, programmerjake octavius cesar mikolajw jn lxo sadoon_albader[m | 21:49 |
| lkcl | anyone else if they'd like to | 21:49 |
| octavius | David and I are in | 21:49 |
| programmerjake | sec... | 21:50 |
| octavius | My gitlab if you need it luke: https://gitlab.com/technepisteme | 22:49 |
| lkcl | octavius, star | 23:50 |
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