| programmerjake | turns out that pywriter actually doesn't ever run a nmigen Simulation, so trying to fix that was a dead-end | 01:06 |
|---|---|---|
| programmerjake | the issue I was running into was the parser not being fully reset between parses | 01:06 |
| programmerjake | so I added a `reset` method | 01:07 |
| programmerjake | and called it right before calling yacc's parse | 01:07 |
| sadoon_albader[m | <lkcl> "oh btw do join #debian-ports and..." <- So I'm trying to join the channels but I can't find them on matrix's OFTC thing | 07:34 |
| sadoon_albader[m | Do I need to use IRC separately for those? | 07:35 |
| programmerjake | i'd expect there's just not a matrix room for the irc channel yet cuz no one tried to connect yet...try manually constructing the channel name and connecting to it...alternatively type the `!join #debianppc` command into the bridge bot's chat...sec | 07:38 |
| markos | sadoon_albader[m, I've seen people using matrix-irc bridge on OFTC so it should be possible | 07:38 |
| sadoon_albader[m | I tried this kind of syntax which worked before but it didn't work here | 07:39 |
| sadoon_albader[m | #debian-ports:irc.oftc.net | 07:39 |
| programmerjake | for libera, it's appservice | 07:39 |
| programmerjake | oftc's matrix bridge uses a different syntax, like #_oftc_#libre-soc:matrix.org | 07:40 |
| sadoon_albader[m | I'll try that | 07:40 |
| sadoon_albader[m | Worked! | 07:41 |
| sadoon_albader[m | Thanks | 07:41 |
| programmerjake | yay! | 07:41 |
| lkcl | programmerjake, regarding proposing adding log2 to the Power ISA Specification Working Group, i should not have to remind you that that needs discussion and proper tracking. | 11:58 |
| lkcl | i'm barely keeping up with the technical issues involved in getting linux-5.7 working, i need you to take responsibility here for following the procedures/processes inherent in developing Standards. | 12:00 |
| lkcl | especially given that they're not our Standards and not our procedures, but those of the OpenPOWER Foundation | 12:01 |
| lkcl | drat, last verilator simulation run fixing hrfid didn't solve the DEC timer exception jumping to 0x8320 instead of 0xc0000000008320 | 12:54 |
| lkcl | 0xcNNNNNNNNNNNNN is "relocatable" (virtual) kernel execution | 12:55 |
| lkcl | i don't have enough information to go on and every time executing 30 million instructions is an EIGHT hour round-trip. | 12:55 |
| lkcl | damnit | 12:55 |
| lkcl | with no access to things like SRR0 and SRR1 this is damn difficult to track | 12:59 |
| lkcl | arrgh it looks like exceptions don't preserve some of the bits of SRR1 that were already set | 13:06 |
| lkcl | this is code written 18+ months ago, we just never had anything run that actually used this "for real" | 13:13 |
| lkcl | gah | 13:13 |
| lkcl | patience, patience... | 13:13 |
| lkcl | one step at a time | 13:13 |
| octavius | That's why you have emphasis on unit tests, right? Or do they not cover your specific problem? | 13:14 |
| lkcl | no chance | 13:16 |
| lkcl | the unit tests written so far only cover things that we have actually understood | 13:16 |
| lkcl | slowly over time what i've been doing is extracting pieces of assembler from microwatt running things | 13:17 |
| lkcl | but only where and when i have had access to the signal traces and/or debug (DMI-interface) information to get all the registers in order to be *able* to write the unit test | 13:17 |
| lkcl | running under verilator natively like this is completely new, so there *is* no infrastructure in microwatt-verilator to extract registers | 13:18 |
| lkcl | therefore i'm running blind | 13:19 |
| lkcl | and i reaallly don't like "guessing" on an 8-hour round-trip | 13:19 |
| lkcl | this what we missed | 13:21 |
| lkcl | https://git.libre-soc.org/?p=microwatt.git;a=blob;f=writeback.vhdl;h=65da537e19b3a05270c9b71efed215a669cdb9bb;hb=6d827b93580684e5977f5d7340ed128521161f42#l132 | 13:21 |
| lkcl | lines 132 and 134 | 13:21 |
| lkcl | which, on a TRAP/interrupt, copy MSR over into SRR1 (so it can be restored on return from interrupt) | 13:22 |
| lkcl | but the bit i missed was that bits 0-5 and 11-14 must come from the *original* SRR1. | 13:22 |
| lkcl | just realised i'm going to have to check that TRAP requests a read of the SRR1 register back in PowerDecoder2 | 13:23 |
| lkcl | otherwise SRR1 will be zero on entry to the trap pipeline | 13:24 |
| lkcl | damn, nope, it wasn't being read. lucky i remembered that | 13:25 |
| lkcl | the fact that this kind of detail is buried in a paragraph somewhere in a 1,300 page manual isn't helping | 13:26 |
| lkcl | found the relevant section v3.0C p1063 Book III section 7.2.1 | 13:37 |
| lkcl | and it's just as unhelpful/obscure as i was expecting it to be | 13:37 |
| lkcl | it doesn't explicitly say "preserve these bits" | 13:37 |
| lkcl | it gives a description of how to go about *working out* which bits should be preserved in SRR1, urrrr | 13:38 |
| lkcl | yyyep, need to go back to DMI debug comparisons. | 17:00 |
| lkcl | means adding read of SPRs through the DMI interface | 17:01 |
| lkcl | programmerjake, nice find on dcbz, that means a hell of a lot less work for us | 18:32 |
| programmerjake | :) | 18:40 |
| programmerjake | they likely figure that log2(x) (with subscript 2) is standard math notation so it doesn't need to be explained. | 18:41 |
| lkcl | sigh, yehhh makes sense | 19:18 |
| lkcl | we're likely to encounter... resistance on that one (but not from Paul and Toshaan) | 19:18 |
| lkcl | "but but it's obvious!" | 19:18 |
| * lkcl currently doing a slightly scary move of DEC and TB SPRs from FastRegs over to StateRegs | 19:19 | |
| lkcl | which is like, really intrusive. | 19:20 |
| lkcl | SPRs are split now across *three* separate types of regfile | 19:21 |
| lkcl | Slow, Fast, and STATE | 19:21 |
| lkcl | oh, where DSISR and DAR are actually managed by LoadStore1, and PIDR and PGTBL by the MMU | 19:22 |
| lkcl | five frickin locations for MTSPR and MFMSPR to hunt through / redirect | 19:22 |
| lkcl | there's supposed to be 1024 SPRs so i created a map | 19:24 |
| lkcl | but now that map has to be not just between the 1024-SPRs-to-8-FASTregs | 19:25 |
| lkcl | but also between 1024-SPRs-to-STATE-regs (for DEC and TB) | 19:25 |
| lkcl | reason being, i want to move SRR0/1 and others into FAST, for microwatt compatibility, and there's not enough room | 20:51 |
| programmerjake | lkcl toshywoshy etc. meeting in 3min | 21:57 |
| programmerjake | lkcl one other thing to work on, maybe after fosdem, is the new nlnet grant stuff...i'd like to be able to submit a rfp for ternlog | 23:42 |
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