| lkcl | that did it | 00:49 |
|---|---|---|
| lkcl | i was looking for that file | 00:49 |
| programmerjake | :) | 00:50 |
| lkcl | gaah that was complicated, but looks like it's functional | 00:55 |
| programmerjake | oh, btw, you can use `git commit --allow-empty` rather than modifying files if you need to push something but don't need any changes | 01:50 |
| *** alMalsamo is now known as littlebobeep | 06:26 | |
| programmerjake | pretty interesting -- tour of datacenter with a bunch of power10 servers: https://youtu.be/bpTNcbnZjvY | 10:16 |
| programmerjake | and x86 and z-series | 10:16 |
| Veera[m] | Did lkcl finished the fpga milestone in time! | 10:45 |
| programmerjake | idk, but he's at least very close | 10:48 |
| Veera[m] | did he got project time extension | 10:58 |
| programmerjake | iirc he has some plans for dealing with that (he talked to me privately, idk if he wants me to share them publicly just yet in case they don't work out, i'm assuming he'll announce them shortly) | 11:03 |
| Veera[m] | ok | 11:03 |
| lkcl | programmerjake, "why c isn't a language" went down reaaallly well on slashdot.. https://developers.slashdot.org/story/22/04/03/1850217/why-c-isnt-a-programming-language-any-more#comments | 15:16 |
| Veera[m] | lkcl: University of Oregon did not respond with successfull account opening status. Did Erik or Sameer contacted you? | 15:19 |
| Veera[m] | lkcl: By the way I uploaded nextpnr-xilinx-install script! | 15:19 |
| lkcl | Veera[m], not yet. i can ping them on Friday | 16:45 |
| lkcl | if they haven't responded already by then | 16:45 |
| lkcl | yes i saw, it looks great | 16:45 |
| lkcl | i am going to run it now | 16:45 |
| Veera[m] | lkcl: Please tell the result soon | 16:47 |
| lkcl | Veera[m], nextpnr-xilinx _really_ should not need yosys or buster-updates | 16:59 |
| lkcl | nextpnr-ecp5 does not | 17:00 |
| lkcl | if yosys is required then it should be assumed to already been installed (by the other dev-env-setup scripts) | 17:02 |
| tplaten | I got the first few instructions working correctly for microwatt_verilator | 17:04 |
| lkcl | tplaten, excellent | 17:05 |
| tplaten | The first 13 instructions seem to be correct | 17:38 |
| Veera[m] | <lkcl> "if yosys is required then it..." <- A recent yosys known to work with nextpnr-xilinx may be essential (I thought). And because nextpnr recommends latest working git commit! | 17:39 |
| lkcl | yeah that's not going to work :) | 17:39 |
| lkcl | what they *recommend* and what in actual reality will work when doing *actual* designs are two different things | 17:40 |
| Veera[m] | lkcl: So should I remove yosys instructions? What version of yosys you recommend? | 17:41 |
| lkcl | saying "use the latest" means, putting it bluntly, "we can't be bothered to coordinate reliable versioning, compatibility or stable interoperability" | 17:41 |
| lkcl | putting it more realistically, "nobody's damn well paying us jack so we do what we can and/or what we can cope with" | 17:41 |
| lkcl | yosys should be removed entirely. | 17:41 |
| lkcl | and the inclusion of buster-updates | 17:41 |
| lkcl | i've already done it, just not committed | 17:42 |
| Veera[m] | I used a tested working yosys version from symbiflow project (recommendation) | 17:42 |
| lkcl | Veera[m], whatever yosys recommends, whatever symbiflow recommends, it is critically important *not* to do so | 17:42 |
| lkcl | we have *very* specific versions of very specific packages that will only work successfully | 17:42 |
| Veera[m] | Yeah I knewed that. | 17:43 |
| lkcl | whatever {insert random project} says "is recommended" is going to cause failures | 17:43 |
| Veera[m] | Can you please commit the correct version | 17:43 |
| lkcl | there is no "correct" version | 17:43 |
| lkcl | this script should install nextnpr-xilinx and nextpnr-xilinx onl | 17:43 |
| lkcl | y | 17:43 |
| Veera[m] | And I have not put buster-updates. It is only buster backports (needed for cmake) | 17:44 |
| Veera[m] | lkcl: ?? | 17:44 |
| openpowerbot | [mattermost] <lkcl> my internet connection was disconnected | 17:52 |
| openpowerbot | [mattermost] <lkcl> still recovering | 17:52 |
| openpowerbot | [mattermost] <lkcl> cmake works fine without buster-backports. | 17:53 |
| openpowerbot | [mattermost] <lkcl> *another* script needs a *different* version of cmake | 17:53 |
| openpowerbot | [mattermost] <lkcl> look again at nextpnr-ecp5 | 17:53 |
| Veera[m] | ok. So I will adjust script so that yosys dependencies are not installed and backports is not used. | 17:56 |
| openpowerbot | [mattermost] <lkcl> 1 sec | 17:56 |
| openpowerbot | [mattermost] <lkcl> done | 17:57 |
| openpowerbot | [mattermost] <lkcl> now to run it on silicon server | 17:57 |
| openpowerbot | [mattermost] <lkcl> ok it's now running | 18:00 |
| openpowerbot | [mattermost] <lkcl> ok installed | 18:12 |
| openpowerbot | [mattermost] <lkcl> now for nmigen so i can run a test | 18:12 |
| Veera[m] | yey | 18:16 |
| openpowerbot | [mattermost] <lkcl> can'tremember the command needed... oh yes ... xc3sprog | 18:25 |
| Veera[m] | is it working, success! | 18:48 |
| lkcl | just installed yosys | 19:12 |
| lkcl | urrr xc100.bin file is in the wrong directory | 19:13 |
| lkcl | expected to be in /usr/share/nextpnr/xilinx-chipdb | 19:14 |
| lkcl | which comes from a CHIPDB define... | 19:15 |
| Veera[m] | I have put in different dir. And adjusted xilinx/examples/attosoc/attosoc.sh script accordingly | 19:18 |
| lkcl | ah brilliant | 19:20 |
| lkcl | shouldn't really be in /usr/share, should be in /usr/local/share but i'm not going to worry about that | 19:20 |
| lkcl | drat, fasm2frames is missing | 19:22 |
| lkcl | ah, it isn't... it's just that the python libraries it needs are in a "stupid" location | 19:25 |
| lkcl | (not in the python path) | 19:25 |
| lkcl | that means that /usr/local/bin/fasm2frames hasn't been installed in a standard pythonic way | 19:26 |
| lkcl | Veera[m], can you put this line into /usr/local/bin/fasm2frames, with a note, "this is a dreadful hack" | 19:31 |
| lkcl | or something | 19:31 |
| lkcl | sys.path.append("/usr/local/nextpnr-xilinx") | 19:31 |
| lkcl | or better "a proper setup.py should be used for fasm2frames with an entrypoints console-scripts | 19:32 |
| lkcl | entry_points={ | 19:32 |
| lkcl | 'console_scripts': [ | 19:32 |
| lkcl | 'pywriter=openpower.decoder.pseudo.pywriter:pywriter', | 19:32 |
| Veera[m] | fasm2frames is installed with fasm pkg while installing prjxray | 19:33 |
| Veera[m] | pip3 install prjxray | 19:33 |
| lkcl | then it's a total dog's dinner | 19:35 |
| lkcl | gaah | 19:36 |
| lkcl | can you raise a bugreport about that? | 19:38 |
| lkcl | https://pypi.org/project/fasm/ | 19:38 |
| lkcl | https://github.com/chipsalliance/fasm | 19:38 |
| lkcl | ah ha | 19:39 |
| lkcl | https://github.com/chipsalliance/fasm/blob/master/setup.py | 19:39 |
| lkcl | rrright. installing from source might do better | 19:39 |
| lkcl | btw also the database is in the wrong location as well... | 19:39 |
| * lkcl thinks | 19:39 | |
| lkcl | tell you what, i'm going to alter nmigen-boards to use the nextpnr-xilinx locations | 19:40 |
| lkcl | don't do the alterations to /usr/share | 19:40 |
| lkcl | i'll change nmigen to instead match /usr/local/nextpnr-xilinx | 19:40 |
| Veera[m] | sorry. fasm2frames is part of prjxray and pip3 fasm. In my way of setup at /usr/local/nextpnr-xilinx/utils/fasm2frames.py | 19:42 |
| Veera[m] | and not pip3 fasm!!! | 19:43 |
| Veera[m] | please use env var PATH and XRAY_DIR to /usr/local/nextpnr-xilinx | 19:44 |
| lkcl | the problem is that nmigen-boards uses DB_DIR/something | 19:45 |
| lkcl | where the installation goes into DB_DIR/somewhere_else | 19:45 |
| lkcl | one puts in ${DB_DIR}/database | 19:46 |
| lkcl | the other expects to be ${DB_DIR}/xilinx-db | 19:46 |
| lkcl | so using DB_DIR (or XRAY_DIR) ain't gonna help, it'll still be wrong | 19:46 |
| Veera[m] | //usr/local/nextpnr-xilinx/utils/environments.sh has some fixed var for paths | 19:48 |
| Veera[m] | please see nextpnr-xilinx-install script. I have copied utils directory from source to /usr/local/nextpnr-xilinx/ and tools file to /usr/local/nextpnr-xilinx/build | 19:49 |
| lkcl | ok i am on uoregon silicon server | 19:54 |
| lkcl | that's really odd | 19:56 |
| lkcl | https://github.com/f4pga/prjxray/blob/master/setup.py#L43 | 19:57 |
| lkcl | that's correct | 19:57 |
| lkcl | ok i got it | 20:00 |
| lkcl | if you use "python3 setup.py develop" *instead* of "pip3 install ." it will "work" | 20:00 |
| lkcl | because the directory "/home/${SUDO_USER}/src/nextpnr-xilinx/prjxray" will be added into $PYTHONPATH | 20:01 |
| Veera[m] | lkcl: fpga milestone for NGI POINTER?!!! Did you made in time! | 21:02 |
| lkcl | Veera[m], no, i'm behind by 4 days now | 21:29 |
| Veera[m] | oh | 21:31 |
| Veera[m] | did that board attached to Silicon server worked!! | 21:32 |
| lkcl | yes! | 21:39 |
| lkcl | erik kindly confirmed | 21:39 |
| lkcl | i'm currently installing ls2 | 21:39 |
| Veera[m] | oh. good | 21:40 |
| lkcl | that should get me a build where i can get some console output | 21:49 |
| lkcl | wheeeee | 21:53 |
| lkcl | Veera[m], i did this to "fix" the nextpnr-xilinx iss | 21:59 |
| lkcl | https://gitlab.com/nmigen/nmigen/-/commit/97c5cd1bb02e34ceb6739fb1f13ad5b984adb60c | 21:59 |
| lkcl | so you don't need to modify the directories esp. XRAY_DB | 21:59 |
| Veera[m] | dfutil, openFPGALoader, ujprog and fujprog: do I have to make combined install script or separate one for each | 22:09 |
| lkcl | a combined script, just drop all of them in | 22:10 |
| lkcl | and xc3sprog and ecppack | 22:10 |
| lkcl | https://github.com/xtrx-sdr/xc3sprog/ | 22:10 |
| lkcl | sorry ecpprog | 22:10 |
| lkcl | https://github.com/gregdavill/ecpprog | 22:10 |
| lkcl | they're "general FPGA programming" tools and we might as well have all of them | 22:11 |
| Veera[m] | so console output for ls2 came? | 22:15 |
| Veera[m] | I mean, is it a local board on your desk/room? | 22:15 |
| lkcl | not yet, i messed up | 22:21 |
| Veera[m] | Does xc3sprog supports xc7 (artix-7)? | 22:21 |
| lkcl | yes | 22:21 |
| lkcl | treated as "nexys4" | 22:21 |
| lkcl | it's all already encoded into nmigen_boards arty_a7.py | 22:22 |
| Veera[m] | Eh, Luke will the name fpga-boot-loaders-progs be good! | 23:34 |
| lkcl | pffh sure :) | 23:35 |
| Veera[m] | thanks | 23:35 |
| lkcl | i got libre-soc compiled and running hello_world.bin on the A7-100t connected to UOregon's server | 23:35 |
| lkcl | so that's confirmed, functional, the UART as well | 23:35 |
| lkcl | i had to work out how to do USB remote power-cycle (!) | 23:36 |
| Veera[m] | great! | 23:36 |
| Veera[m] | And so for nextpnr-xilinx-install script only that "python3 setup.py develop" has to be added. As I wrote yosys dependencies may be removed. Any other changes for that script? | 23:38 |
| lkcl | i already did the removal of yosys. | 23:43 |
| lkcl | just the python3 setup.py develop and that should be it | 23:43 |
| lkcl | needs confirming though | 23:43 |
| lkcl | if you can re-run it, in a new chroot | 23:44 |
| lkcl | but use hdl-yosys-tools to install yosys in the same (new) chroot | 23:44 |
| octavius | I ran hdl-yosys-tools in a new chroot on my laptop earlier today, installed fine (although I didn't run any .il files through it yet) | 23:49 |
| lkcl | ya got a half-decent laptop? | 23:49 |
| lkcl | 16 GB RAM or higher? | 23:50 |
| octavius | nah, 4GB core 2 duo from 12 years ago XD | 23:50 |
| octavius | but it works fine, so I use it | 23:51 |
| octavius | Figured may as well do work while I visit at the hospice | 23:51 |
| lkcl | ooo. melt, melt | 23:51 |
| octavius | It did compile....after a while XD | 23:51 |
| lkcl | yyeah 4GB RAM... hey if you're allowed internet connectivity you can ssh into the server | 23:52 |
| lkcl | talos1.libre-soc.org | 23:52 |
| lkcl | that's a Monster | 23:52 |
| octavius | Also, nmigen question, if I want to compare a signal against a constant, can I just use m.If(signal==1)?) | 23:52 |
| octavius | Heheh, maybe later, I want to have a local environment for small dev | 23:52 |
| lkcl | if it's a 1-bit SIgnal, just do "m.If(Signal) | 23:53 |
| lkcl | " | 23:53 |
| octavius | Unfortunately it can be more than 1 bit | 23:53 |
| octavius | say 2-bits, 0/1/2/3 | 23:53 |
| lkcl | it *should* work but i generally do an explicit Const(value, bitlength) | 23:53 |
| octavius | Ah ok | 23:53 |
| lkcl | you can check it for yourself by converting to verilog | 23:53 |
| octavius | because the issue I've been trying to hammer is the GPIO blocks connections of individual GPIOs to the common WB bus, need to have a mux controlled by the address (row+byte) | 23:54 |
| lkcl | https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/bus/syscon.py;h=ff044f2c6d7bb79ad157768b13053d9fe98a65dc;hb=2b8f22c9caefd4238b26c1c9cfcfecc4372df262#l98 | 23:55 |
| octavius | What you mentioned is what I was thinking of doing, will implement it tomorrow, about time XD | 23:55 |
| lkcl | another way: if you know it's only 1 bit that you want to test: | 23:55 |
| lkcl | m.If(signal[341592653589793]): | 23:55 |
| octavius | It cant be one bit unfortunately. For example, WB bus is 32bits (4 bytes) and 16 GPIOs will give you 4 addresses (or rows) | 23:56 |
| octavius | But what you said about doing Const() should work | 23:57 |
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