| lkcl | fantastic | 03:02 |
|---|---|---|
| littlebobeep | So I heard of SOCs having "default values" for registers, but as I understood it registers are volatile memory storage so are empty at poweroff, where are default values stored and how do they communicate the values to registers? | 07:34 |
| littlebobeep | lkcl: I don't know if this question ^ applies to libre-soc I am sorry | 07:34 |
| lkcl | littlebobeep, ah, right, ok. so, what happens is, CMOS transistors come up in totally random states | 07:41 |
| lkcl | no problem at all btw | 07:41 |
| littlebobeep | binary states? | 07:42 |
| lkcl | when power is applied, you have transistors arranged to create D-Flip-Flops and SR-Latches | 07:42 |
| lkcl | hopefully binary states, yes! | 07:42 |
| lkcl | but all binary logic is actually implemented with analog transistors | 07:43 |
| lkcl | which is something that many VLSI Engineers and Hardware Engineers, primarily trained in digital, forget | 07:43 |
| littlebobeep | Ummm you mean on a semiconductor IC? binary logic on other media might have different physical form...? | 07:43 |
| lkcl | so these D-Flip-Flops (DFFs), when powered up, you have absolutely no idea what state they start up in | 07:44 |
| lkcl | yes. | 07:44 |
| lkcl | a "digital" semiconductor IC is actually made from *analog* transistors | 07:44 |
| lkcl | which are *used* to create digital circuits | 07:45 |
| lkcl | so let's assume that the register r0 is made up of 64 DFFs | 07:45 |
| lkcl | when it is powered up, every single one of those DFFs comes up in a completely unknown state. | 07:45 |
| lkcl | there is a pair of analog transistors, one is used to pull the output to a "1" | 07:46 |
| lkcl | the other is used to pull the output to a "0" | 07:46 |
| lkcl | on startup you have *no idea* which one of those two transistors is going to "win" | 07:46 |
| lkcl | and that's why all registers end up with utterly random values | 07:47 |
| lkcl | to deal with that, you have to have a "reset" period | 07:47 |
| lkcl | where the ENTIRE design has a global signal propagating right the way through it, pulling absolutely everything and i mean everything into a "known state" | 07:47 |
| lkcl | aka | 07:47 |
| lkcl | "default values" | 07:48 |
| lkcl | bottom line is, registers - aka volatile memory storage - are *not* empty at power-on and in many cases they're not empty at power-off either | 07:48 |
| lkcl | because you get residual capacitance (it's all analog, remember?) | 07:48 |
| littlebobeep | So what is there electricity being sent to these two analgue transistors (in equal amounts) and you don't know one "wins"? How does one "win" what external factor determines which transistor is chosen somehow? | 07:49 |
| littlebobeep | I would expect them to be not empty at poweroff because they might've just been processing data moving bits around, but I did not know they are non-empty at powerup... do SRAM or DRAM also have values/data in them at init? | 07:51 |
| lkcl | that's the point, it's not necessarily equal, because we're talking about the power-up (startup) time | 07:51 |
| lkcl | SRAM is also based on a pair of transistors, and DRAM is actually capacitors | 07:51 |
| lkcl | so, logically, yes | 07:52 |
| littlebobeep | Why would electricity be delivered more equally after the computer is boot compared to when it is first powered on? | 07:52 |
| lkcl | during power-up, everything's desperately trying to get from zero voltage to power-on-voltage (maybe 1.1v, maybe 1.8v, depends on the design) | 07:52 |
| lkcl | that's another very good question | 07:52 |
| lkcl | it's down to the amount of current | 07:53 |
| lkcl | again, this comes down to all electronics being analog | 07:53 |
| lkcl | every transistor and the wires connected to it are actually capacitors (and inductors) | 07:53 |
| lkcl | changing a capacitor's voltage *requires* current | 07:53 |
| littlebobeep | Digital electronics is a field of electronics involving the study of digital signals and the engineering of devices that use or produce them. This is in contrast to analog electronics and analog signals. | 07:54 |
| littlebobeep | Digital electronic circuits are usually made from large assemblies of logic gates, often packaged in integrated circuits. Complex devices may have simple electronic representations of Boolean logic functions. | 07:54 |
| lkcl | you're always fighting against the voltage, to get the transistor to change from a low-voltage state (close to 0v) to a high-voltage state (close to 1.8v or whatever the voltage rail is) and vice-versa | 07:54 |
| lkcl | indeed - but you have to realise and appreciate that there are no special "digital transistors" | 07:55 |
| lkcl | you *have* to use *analog* transistors for the *purpose* of creating "digital" circuits | 07:55 |
| littlebobeep | I just learned there are non-MOS transistors I did not know this | 07:55 |
| lkcl | those logic gates are constructed from analog transistors whose *purpose* is to create digital logic | 07:56 |
| lkcl | yes there's i think 4 types, P N and two others. | 07:56 |
| littlebobeep | Bipolar junction transistor (BJT) Darlington transistor Diffused junction transistor Field-effect transistor (FET) | 07:56 |
| littlebobeep | Junction Gate FET (JFET) Organic FET (OFET) Light-emitting transistor (LET) | 07:56 |
| littlebobeep | Organic LET (OLET) Pentode transistor Point-contact transistor Programmable unijunction transistor (PUT) Static induction transistor (SIT) Tetrode transistor Unijunction transistor (UJT) | 07:56 |
| lkcl | it's down to the permutations of the chemicals. the other two types are not very common | 07:57 |
| littlebobeep | I want to learn the difference between these >_< | 07:57 |
| lkcl | i've heard of some of them, and i'll leave that up to you to work out :) | 07:57 |
| lkcl | i know enough to be focussed on the tasks i'm doing and not get "caught out" if you know what i mean (run into difficulties because of something i'd not known could happen) | 07:58 |
| littlebobeep | Well those are non-MOS transistors only I don't even know how important they are | 07:59 |
| littlebobeep | So this "reset" period that emits a signal inot a "known state" when is the motivation to choose a pattern for the default values, is any computation made on the basis of these default values? | 08:05 |
| littlebobeep | /s/inot/in | 08:05 |
| littlebobeep | s/when/what | 08:05 |
| littlebobeep | Someone speculated that the different default values applied to registers might affect bugs in different chips of supposedly same model SOC might cause bugs like failing to suspend to RAM later on, but I do not understand why default values can cause such issues so much later on if they change right away to begin processing data like loading bootloader then kernel, etc. | 08:18 |
| littlebobeep | Not sure why or how the registers would change before bootloader, but I guess bootloader can be broken up into different parts technically it seems a broad term perhaps | 08:19 |
| littlebobeep | lkcl: So does DRAM also init with random config/data even though it is capacitors? | 09:14 |
| littlebobeep | This is bizarre to me https://patents.google.com/patent/US1745175 Field effect transistor invented/conceptualized in 1925 but could not build due to lack of resources, this is over 2 decades before one was built.... reminds me of the story of Philo Farnsworth coming up with the idea of analogue television transmition in a farm field before inventing anything | 09:32 |
| lkcl | it's the same with the electric motor. | 11:18 |
| lkcl | the fundamental design has not changed in 150 years: there have been no new innovations | 11:18 |
| lkcl | it's just that designs have not been implementable due to limitations in materials science | 11:18 |
| lkcl | e.g. the air-gap spinning between the permanent and the electro magnets has to be minimised to below thousands of a millimetre in order to be efficient | 11:19 |
| lkcl | and that small a gap on the *entire* surface of a spinning object simply wasn't possible | 11:20 |
| lkcl | ok so we actually have something like this (default non-zero values) for PC and MSR, right now | 12:42 |
| lkcl | the default initialisation for MSR is 0x8000_0000_0000_0001 | 12:42 |
| lkcl | (Little-Endian, 64-bit) | 12:42 |
| lkcl | let's say you're running a big-endian OS | 12:43 |
| lkcl | that would be 0x8000_0000_0000_0000 | 12:43 |
| lkcl | where you set MSR - and run - in memory - with MSR=0x8000_0000_0000_0000 | 12:43 |
| lkcl | now let's say you suspend, power-off, and resume. | 12:43 |
| lkcl | what value, at power-up, is the hardware setting MSR to? | 12:43 |
| lkcl | it's 0x8000_0000_0000_0001, isn't it? | 12:44 |
| lkcl | if therefore your bootloader *forgets* to initialise MSR equal to the correct value, everything goes to shit pretty quickly | 12:44 |
| lkcl | other registers may have more subtle effects but i picked MSR because it literally controls how the processor works. switches on 64/32-bit mode, etc. | 12:46 |
| tplaten | I'm trying to get ls2 running in Verilator, When I run make ls2.v I get: | 13:23 |
| tplaten | File "src/ls2.py", line 599, in __init__ | 13:23 |
| tplaten | latency=7) # Winbond W956D8MBYA | 13:23 |
| tplaten | TypeError: __init__() got an unexpected keyword argument 'name' | 13:23 |
| tplaten | After a git pull lambdasoc/periph/hyperram.py | 7 +++++-- I get | 13:45 |
| tplaten | AttributeError: 'list' object has no attribute 'ports' | 13:46 |
| lkcl | tplaten, give me a second i know what that is. | 14:04 |
| lkcl | it should be ports += list(self.hyperram[0].ports()) etc. | 14:04 |
| lkcl | tplaten, sorted, git pull | 14:06 |
| lkcl | Veera[m], dates in TOML are formatted YYYY-MM-DD not DD-MM-YYYY :) | 14:13 |
| lkcl | you should have been paid already, do update the records, add ", paid=YYYY-MM-DD" to the TOML field | 14:14 |
| tplaten | now it is working again | 14:15 |
| lkcl | great | 14:20 |
| lkcl | tplaten, would you like to be included on the NGI POINTER team? at least you have done the orangecrab, worked on the simulation | 14:20 |
| tplaten | Yes, of course. I'll plan to continue working on the orangecrab/verilator simulation. And I the future I might want to work on Vulkan drivers. | 14:22 |
| tplaten | From verilator I get | 14:23 |
| tplaten | %Error-TIMESCALEMOD: ls2.v:5:8: Timescale missing on this module as other modules have it (IEEE 1800-2017 3.14.2.2) | 14:23 |
| lkcl | yep no surprise there | 14:23 |
| lkcl | ok i'll cc you | 14:24 |
| openpowerbot | [mattermost] <lkcl> paulus: i got 30 mhz execution out of nextpnr-xilinx on microwatt.v | 17:03 |
| lkcl | ahh, good, i'm getting to the exact same point in microwatt.v | 17:44 |
| lkcl | [ 0.000000] radix-mmu: Mapped 0x0000000000600000-0x0000000010000000 with 2.00 MiB pages | 17:44 |
| lkcl | <- early_setup() | 17:44 |
| lkcl | hoorah. | 17:44 |
| lkcl | just enabled a bit more debug info, set the device-tree frequency to the same value | 17:45 |
| lkcl | programmerjake, good call on the self-looping div | 20:48 |
| lkcl | because it's the exact same principle as madded it's easily justifiable | 20:49 |
| programmerjake | :) | 20:49 |
| programmerjake | https://viterbischool.usc.edu/news/2022/04/usc-viterbi-led-team-wins-u-s-nsf-expeditions-in-computing-award-to-advance-superconducting-electronics-design/ | 20:50 |
| lkcl | why have i heard of viterbi decoders? | 20:50 |
| programmerjake | afaict it's just a coincedence | 20:52 |
| lkcl | urrr mtmsr is revealing that HV bit is set | 20:52 |
| lkcl | This Is Bad(tm) | 20:52 |
| lkcl | it tells the linux kernel to enable hypervisor guest mode | 20:52 |
| programmerjake | well...no wonder it broke | 20:52 |
| lkcl | what the hell it's doing running the verilator run successfully but not this one is beyond me | 20:55 |
| lkcl | but that was appx 3 months ago. nothing should have changed, sigh | 20:56 |
| lkcl | off we go, another run, another memcpy from SPI flash | 20:57 |
| lkcl | paul mackerras had a bit of a lairy time getting the hypervisor-avoidance right | 20:58 |
| lkcl | had to set (or not-set) just the right bits | 20:58 |
| sadoon[m] | @lkcl you know how stupid I feel after realizing that I only need a tunnel to *the VM* and not my entire Talos machine? :) | 22:16 |
| sadoon[m] | It's much safer this way anyway | 22:17 |
| sadoon[m] | Especially with qemu usermode networking | 22:18 |
| lkcl | sadoon[m], *snort* | 22:40 |
| lkcl | ya got there in the end | 22:41 |
| lkcl | btw small favour, just use the IRC convention "{username}:" | 22:41 |
| lkcl | rather than the socially-media-ey "@" | 22:41 |
| lkcl | mediawiki kicks in on mattermost and sends me a completely unnecessary email | 22:42 |
| lkcl | "lkcl:" results in a minor notification in hexchat, because i switched off pretty much everything, years ago, so as not to interrupt workflow | 22:44 |
| sadoon[m] | Good lord that's intrusive | 22:54 |
| sadoon[m] | Can't you disable it? | 22:54 |
| sadoon[m] | And of course, will do! | 22:56 |
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