| programmerjake | thx | 00:00 |
|---|---|---|
| programmerjake | got it to work: https://git.libre-soc.org/?p=soc.git;a=commitdiff;h=a938111eb3b1ffc51874cef672e8051efdafa3c0 | 00:23 |
| lkcl | fantastic | 00:39 |
| lkcl | dang, got as far as "devtmpfs: initialized" | 00:40 |
| programmerjake | :) | 00:40 |
| lkcl | that's amazing that the MMU was "happy" | 00:42 |
| lkcl | given that i reduced the number of TLB entries i think to like... 4? | 00:42 |
| programmerjake | well...technically it should work with 1 data tlb and 1 instruction tlb entry...assuming the hdl supports that | 00:43 |
| lkcl | yeah should do | 00:43 |
| lkcl | but it's not matched up in the devicetree file | 00:44 |
| lkcl | i don't know what effect that has | 00:44 |
| lkcl | i really should do a CRC32 check on the data copied from flash into HyperRAM | 00:45 |
| programmerjake | it's kinda like saying your usb cable makes two loops around the table leg before plugging into your hard drive...the sw shouldn't care | 00:45 |
| lkcl | at over 5 metres it will :) | 00:45 |
| programmerjake | you must have huge table legs then... | 00:46 |
| lkcl | lol | 00:46 |
| lkcl | so far so repro'd... up to "mem auto-init"... inode-cache ... | 00:50 |
| lkcl | ICS/ICP... | 00:50 |
| lkcl | time-init... | 00:50 |
| lkcl | devtmpfs: initialized again... | 00:51 |
| lkcl | ahh ok, after that is devices_init() | 00:53 |
| lkcl | and that might be where some attempts to access non-existent devices occur | 00:54 |
| lkcl | which will just lock up the wishbone bus | 00:55 |
| programmerjake | well...it should probably be modified to report an error rather than lock up... | 00:56 |
| lkcl | it's a surprisingly large amount of work | 00:57 |
| programmerjake | it needs to be done at some point... | 00:58 |
| * lkcl put in some printks and sigh realised they should have been udbg_printfs i think, oh well | 00:58 | |
| lkcl | yes | 00:58 |
| lkcl | dang the white arty-a7-100t LEDs are bright | 01:07 |
| lkcl | keep burning my eyes on them :) | 01:08 |
| lkcl | okaay got to of_core init | 01:08 |
| lkcl | ahh a mutex lock | 01:09 |
| lkcl | nggggh.... lwarx and stwcx | 01:21 |
| programmerjake | :) | 01:21 |
| lkcl | or more specifically "stwcx." | 01:21 |
| lkcl | nggggh | 01:21 |
| lkcl | the reason i haven't added them is because stwcx. updates CR0 | 01:25 |
| lkcl | which means having to update LDSTCompUnit - one of the scariest pieces of HDL... | 01:26 |
| lkcl | ah interesting, the lock succeeded | 01:26 |
| lkcl | (or, didn't call lwarx) | 01:27 |
| programmerjake | well, fun...found a paper on error analysis of goldschmidt sqrt algorithm, but it's behind a paywall... | 04:03 |
| programmerjake | https://ieeexplore.ieee.org/document/7421229 | 04:03 |
| programmerjake | I guess I'll try to replicate the error analysis | 04:04 |
| klys | lkcl, have I heard that you can't get simple designs to work on your xilinx board because of the problem you are facing? | 04:55 |
| klys | I am just curious, as I don't have a working fpga yet myself. Is the xilinx one supposed to have a higher capacity than the microwatt board? Is that why you're using it? It is your highest capacity fpga board? | 04:56 |
| lkcl | klys, simple designs aren't a problem. | 08:47 |
| lkcl | like, blinky-lights, uart_demo.py | 08:48 |
| lkcl | there's no such thing as "a microwatt board", fpgas are all generic | 08:49 |
| lkcl | ish :) | 08:49 |
| lkcl | you probably meant, "is the Arty A7-100t which has a 100k LUTs Xilinx FPGA a higher capacity than the VERSA_ECP5 which has a 45k LUTs ECP5 FPGA?" | 08:50 |
| lkcl | where the answer is in the "100k LUTs" being bigger than "45k LUTs" | 08:50 |
| lkcl | and the [not simple at all] libre-soc and microwatt HDL is pushing 42k LUTs (95$) if the L1 caches and MMU are drastically cut back | 08:51 |
| programmerjake | iirc the arty's fpga also has lut6 rather than the ecp5's lut4, meaning the 100k luts count for even more | 08:53 |
| lkcl | yes. it's actually a mix of 60k (ish) LUT6/LUT5/LUT4 | 08:55 |
| lkcl | meaning that the "100k" is an "equivalent to LUT4" number | 08:55 |
| lkcl | i could use the proprietary tools and a hell of a lot of the problems would magically "go away" | 09:02 |
| lkcl | however we'd be pissing on the principle of "Libre" and "full transparency" | 09:02 |
| lkcl | bottom line klys it's quite nuanced - it's in the details - but things are "working", albeit at 25 mhz, without DDR3 (using drastically-simpler HyperRAM) | 09:03 |
| programmerjake | well...that pile of problems is dwarfed by the other pile of problems you'd get from using proprietary tools... | 09:04 |
| lkcl | without using Xilinx FPGA CARRY4 blocks due to limitations inside nextpnr-xilinx, which gives a 30% performance penalty... | 09:04 |
| lkcl | in a word | 09:05 |
| programmerjake | e.g. being tied to your computer's ethernet mac for licensing garbage...several years ago when I had to use them, I installed them inside docker with a spoofed ethernet mac since that made it keep working even if I had to upgrade my motherboard or similar... | 09:06 |
| lkcl | heh that works :) | 09:07 |
| markos | lkcl, did you have a chance to look at the nexys board? I haven't been up to much this week as I got the covid on Monday and am feeling tired all the time | 09:25 |
| programmerjake | hope you feel better... | 09:25 |
| markos | thanks, it feels like a flu, not the worst flu I had, but still annoying | 09:26 |
| lkcl | markos, i'm trying to get linux up-and-running on the arty-a7 | 09:35 |
| lkcl | what is likely to happen is: if resources on that become a problem i'll *have* to do the nexys_video | 09:35 |
| lkcl | but i am resisting that because it'll take me about... estiated... 2 days to do the board-bringup. | 09:36 |
| lkcl | (adding to nmigen, adding 200k to the nextpnr-xilinx build scripts...) | 09:37 |
| programmerjake | well, after writing a giant pile of code today, i'm going to sleep. have fun with the arty, lkcl! | 10:28 |
| lkcl | programmerjake, awesome. willdo | 11:45 |
| Chaul-Jhin-Kim | Hi is this the official support channel for the Libera Chat IRC app? | 13:43 |
| Chaul-Jhin-Kim | Dear GOD/GODS and/or anyone else who can HELP ME (e.g. TIME TRAVELERS or MEMBERS OF SUPER-INTELLIGENT ALIEN CIVILIZATIONS): The next time I wake up, please change my physical form to that of FINN MCMILLAN formerly of SOUTH NEW BRIGHTON at 8 YEARS OLD and keep it that way FOREVER. I am so sick of this chubby Asian man body! Thank you! - CHAUL JHIN | 13:45 |
| Chaul-Jhin-Kim | KIM (a.k.a. A DESPERATE SOUL) | 13:45 |
| *** Chaul-Jhin-Kim <Chaul-Jhin-Kim!~Chaul-Jhi@115-189-130-170.mobile.spark.co.nz> has left #libre-soc | 13:45 | |
| *** ChanServ sets mode: +o lkcl | 14:05 | |
| *** ChanServ sets mode: +q Chaul-Jhin-Kim!*@* | 14:06 | |
| sadoon[m] | Umm | 14:28 |
| sadoon[m] | What | 14:28 |
| lkcl | i know :) | 14:29 |
| lkcl | about on a level as "All Your Base Are Belong To Us" | 14:30 |
| lkcl | programmerjake, is this it | 14:38 |
| lkcl | https://pdf.sciencedirectassets.com/272574/1-s2.0-S0022000000X01651/1-s2.0-S0022000004000960/main.pdf?X-Amz-Security-Token=IQoJb3JpZ2luX2VjEB0aCXVzLWVhc3QtMSJIMEYCIQDv7ihy%2BDKC0rUqpuLrn%2Bc9lPRYcOMbOYIVwGcGxal%2BpAIhAMthD1KbI9Z8aUFpeVA%2BikVirkGSYPkU8Htli3sNTjA3KtsECNb%2F%2F%2F%2F%2F%2F%2F%2F%2F%2FwEQBBoMMDU5MDAzNTQ2ODY1IgwiL8EexMjJFpeKOOkqrwTHmeAeTRidiDzk7wva%2BgxmVKxgrDbmwm8c7exHjEJ4y7hwMhASHcTFTPSnVEsLCm5YJo%2BNSYVyUf%2B2MINKNkL2NdFKaGv9WMP | 14:39 |
| lkcl | 8JjqSa4Jg9vw3S%2FBF0G5AbEzPYArjOVXa8oDia5hXkQ83wFnAoeYEX3liQSumCqO1DMI8WpdOdl63xMROr5Un9KtkcjxxSYs%2FpraZ7fGHyhywdz%2Fl5sd7N6sHTqVIwsId%2BT5IiGwvRVDTMiBLS960VbJDyAGUdem297DxDoJhlhEvOs3GSeZAxuIoIW9x3tl3gboB34UHQvEwoJ1gv34cddSVDNqvRTlkfyI0rWiaBnLpgsuu5o7fKMPbV8a1b%2FlfiDQGXTwWPJ%2FQ7fCs1jyN25WMrv98czahgwav%2BWQLRQh7LQ%2FxHEfqTgB0dhw0KcnRSa1DZH1aZK3H8CYWEDMOXqXNc8Ca14BQ6sG4OAfIziO9L2klOF%2BTIUVf1RoYePxOMc0oIPwHdlx8skO9RJweBLCMUsFkKCIobUqNs4kmWXxmm | 14:39 |
| lkcl | 0TS3COtb%2BllrLkFrsMGE5vdsU32AOzq46qE9tthduzXuMXpUEqurLYug%2FHfrtziocpmdFAoOy7bVKPbm3n4bw73do9C%2FJsNLxUXIg3abwfkg8g%2FNwHAy6u6pW0XVKCR3om56jNV6EHJFsNOZV1bR4KnxmbqoFFUjHGnzV%2BwNYe8YvSY7sii1mWZEpU2omM1egcq5XzVi2T62k1O4JLhAYmi68w2MPubqpMGOqgBNvfGzET7iEhf3H3RSKSFPSAQSVONUylkXx0r3kCpq5ew4U47CVEbyXnv%2B5%2BUBOCdvIyKnr3lWAKl%2BunfWghE%2F7BqWLAvrIYx9EtB5ILAA%2BF1R0jr7ogO%2BAO3VIYnW22Q25q5lDVGyCs4KLrR56mMvEnFprIxehymefJrTCYsyfGqKgOESmnLj%2BJuegcNz1Iab | 14:39 |
| lkcl | 5we9EfvgxQKAElctifgiuRYIllr%2BCEE&X-Amz-Algorithm=AWS4-HMAC-SHA256&X-Amz-Date=20220428T133549Z&X-Amz-SignedHeaders=host&X-Amz-Expires=300&X-Amz-Credential=ASIAQ3PHCVTYX6XIAK4M%2F20220428%2Fus-east-1%2Fs3%2Faws4_request&X-Amz-Signature=8e41ace581a2c99c6089c831a59ee83c3b6f28b3cccb2d22131f0c6a29b1770e&hash=03e80a9665d3b17e5bb0931fae1047ee5232aef3961eb72878621bd38b5a770e&host=68042c943591013ac2b2430a89b270f6af2c76d8dfd086a07176afe7c76c2c61&pii=S002 | 14:39 |
| lkcl | 2000004000960&tid=spdf-d65d0729-a1b1-45e0-a99a-ab31105a74ad&sid=2b11e31260010744073b8814ebd678053348gxrqb&type=client&ua=4d515c5451010202555b&rr=70302eee79a174f9 | 14:39 |
| lkcl | whoa | 14:39 |
| lkcl | insane | 14:39 |
| lkcl | well, i searched for the author and the title and google came up with the direct PDF link | 14:40 |
| lkcl | doi:10.1016/j.jcss.2004.08.004 | 14:40 |
| programmerjake | that's the one on goldschmidt's division algorithm (i already linked to a pdf in the source code in soc.git), i'm searching for the paper they later released on the sqrt algorithm: https://doi.org/10.1109/ACSSC.2015.7421229 | 16:04 |
| programmerjake | lkcl ^ | 16:04 |
| tplaten | Since I try to reproduce ls2 on verilator, I'll first need to compile hello_world.bin with address 0xff00_0000. | 18:53 |
| tplaten | I did not find anything in the mailing list, nor in the chat logs from last week. | 18:53 |
| tplaten | Afterwards I can add documentation how to use verilator to https://libre-soc.org/HDL_workflow/ls2/. | 18:53 |
| tplaten | I solved the first one, setting _start to 0xff000000 in powerpc.lds | 19:06 |
| tplaten | even with the correct firmware address, I don't get any output from microwatt-verilator | 19:11 |
| lkcl | tplaten: it's in the Makefile. | 20:19 |
| lkcl | 8 #BOOT_INIT_BASE ?= 0xf0000000 # at QSPI address | 20:20 |
| lkcl | 9 BOOT_INIT_BASE ?= 0x00600000 # inside DRAM address space | 20:20 |
| lkcl | 10 # BOOT_INIT_BASE ?= 0xff000000 # at ROM hi address (with coldboot firmware) | 20:20 |
| lkcl | 11 # BOOT_INIT_BASE ?= 0x0 # start at zero (usual) | 20:20 |
| lkcl | https://git.libre-soc.org/?p=ls2.git;a=blob;f=hello_world/Makefile;hb=HEAD | 20:20 |
| lkcl | then make sure the correct RAM_INIT_FILE is used | 20:21 |
| lkcl | 29 #RAM_INIT_FILE=hello_world/hello_world.bin | 20:21 |
| lkcl | 30 #RAM_INIT_FILE=../microwatt2/tests/xics/xics.bin | 20:21 |
| lkcl | 31 RAM_INIT_FILE=coldboot/coldboot.bin | 20:21 |
| lkcl | https://git.libre-soc.org/?p=ls2.git;a=blob;f=Makefile;hb=HEAD#l29 | 20:22 |
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