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| programmerjake | ghostmansd: we'll want to add support for PowerISA v3.1 prefixes in addition to SVP64 prefixes sooner or later, so, if it doesn't take much effort it would be useful to have the code your writing be able to handle non-SVP64 prefixes (decoding them fully isn't yet needed, but not assuming all 64-bit instructions are SVP64 instructions would be great) -- i didn't check if you already are doing that, so ignore this if so | 12:00 |
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| lkcl | programmerjake, that can be handled at the time. there's no funding available to pay ghostmansd to add v3.1 prefixes when they are not even going to be implemented right now | 13:03 |
| ghostmansd[m] | programmerjake, https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/sv/trans/pysvp64dis.py;h=23e02859d88a9237da3b0ac899897c2915ec1994;hb=77b720af7da54ba565eee227518fd9f6e3a9131b#l51 | 13:34 |
| ghostmansd[m] | Nobody assumed that the world is aware of only SVP64 instructions. :-) | 13:35 |
| ghostmansd[m] | In fact, other prefixed instruction types can be added atop. | 13:35 |
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| programmerjake | ghostmansd: yay! thx for planning ahead | 21:16 |
| ghostmansd | programmerjake, you're welcome! my pleasure! :-) | 21:33 |
| ghostmansd | I've posted a long and boring comment with details on how this works: https://bugs.libre-soc.org/show_bug.cgi?id=898#c15 | 21:34 |
| programmerjake | nice! | 21:37 |
| ghostmansd[m] | lkcl, regarding pu bits. Do they overlap with elwidth, or do they take bits out of it? | 21:42 |
| ghostmansd[m] | That is, either {"elwidth": (6,), "pack": (4,), "unpack": (5,)}... | 21:44 |
| ghostmansd[m] | ...or {"elwidth": (4, 5, 6), "pack": (4,), "unpack": (5,)} | 21:44 |
| ghostmansd[m] | One minor note in fields. You probably already guessed, but still. The fields are created on a class level, that is, once per field declaration in the specific class. Any instance of say SVP64Instruction simply refers to the same class-specific layout. | 21:47 |
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