Thursday, 2022-09-01

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programmerjakelkcl: fixed and pushed to sv_maxu_works branch, waiting for ci to pass then I'll push to master:
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ghostmansdlkcl, I've raised some disassembly-related tasks, currently not bound to anything, but groupped together. Some of them are already implemented (except for perhaps some future tuning); others are on track.09:39
ghostmansdanother task of minor priority, but still likely essential if we want to compare assembly listings between objdump and pysvp64dis09:54
programmerjakedoesn't objdump have a -M raw flag or something, that makes it not use aliases?09:55
ghostmansdit might be, I'm not sure10:02
ghostmansdanyway we'll likely have to support aliases anyway, including asm itself10:02
programmerjakeyeah, i was very sad to not be able to use aliases when writing the utf-8 made it take probably 15% longer since i had to figure out what the unaliased instruction operands were, particularly annoying for branch conditions10:09
programmerjakeother stuff i just now noticed (again?) when reading through int_fp_mv: the description of how fmvtgs/fmvfgs are incorrect, they do *not* act like frsp in any way. they use the lfs and stfs semantics which use the SINGLE and DOUBLE operations -- they do not round, set flags, or anything like that10:18
programmerjakelkcl: can i fix the descriptions for those?10:18
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programmerjakebasically fmvfgs is equivalent to stw followed by lfs, and fmvtgs is equivalent to stfs followed by lwz10:21
lkclthere is no list of aliases. it is too much. this is not binutils.10:24
lkclprogrammerjake, sure yes go for it on the fmvfgs.  those all need to be drastically reduced to maximum 4 instructions, with say a 5-bit "mode"10:25
lkclotherwise the IBM Architect Opcode Allocation Team are going to freak out10:25
lkclghostmansd[m], we don't have the time or resource to do aliases.  i've closed the bugreport you raised.  if there was a machine-readable list already in the spec i would hesitate but say "yes go for it"10:26
lkclwith that task requiring LITERALLY days possibly WEEKS to go over the entire 1,300 page spec the answer has to be a hard stone-cold "no"10:26
lkclprogrammerjake, you'll just have to live with the lack of aliases, like i and everyone else has, for 2 years.10:27
programmerjakesadness, branch conditions are a pain...10:27
lkclghostmansd[m], brilliant on the bugreports.  cross-linking them to as many other related things makes sure they are not "lost in the noise"10:27
lkclprogrammerjake, yep. tough.  computing the branch offset is a total pain, too.10:28
lkclthat's binutils's job10:28
lkclmarkos was able to use an early version of ghostmansd's binutils-svp64 branch on the mp3 assembler10:28
programmerjakeoh, i solved that, see the utf8 validation script, it adds a bunch of .set at the end for all the labels10:29
lkclahh very cool.10:29
lkcli will raise a bugreport on the OPF ISA WG tracker that a machine-readable list of aliases is missing10:29
* lkcl re-running tests now for that one, jacob10:30
programmerjakeah, it should work, ci passed10:31
lkcli am always double-checking10:31
lkclwith /usr/bin/python3.7 having actually segfaulted (core-dumped, not a bullshit-oh-err-a-runtime-python-exception-is-a-crash-omg-omg)10:32
programmerjakeif you are running pytest, you need SILENCELOG otherwise it runs out of memory due to the huge stdout logs, >14GB for me last i checked10:32
lkcli am now paranoid about duplicating tests10:32
lkclworks perfectly well without it.10:32
lkcllkcl@fizzy:~/src/libresoc/openpower-isa/src/openpower/decoder/isa$ !noh10:32
lkclnohup pytest-3 -v -n auto10:32
lkclnohup: ignoring input and appending output to 'nohup.out'10:32
programmerjakewell, have fun using all your ram then!10:33
lkclcranks the loadavg on my laptop up to 20 and makes browsers completely unresponsive, but it doesn't run out of memory10:33
programmerjakeit's a known bug in pytest10:33
lkclMem 32311/64027MB10:33
lkclnot a problem :)10:34
programmerjakewell, for everyone with <64GB ram, it is a problem. also the tests probably run a lot faster when SILENCELOG=110:34
lkcl2TB NVMe SSD...10:35
programmerjakeuuh, that's not ram...10:36
lkclwe really do need budget allocations for seriously-beefy-HW for everyone10:36
programmerjakepytest stores stdout logs in ram, not on disk10:36
programmerjakeand the bug is it doesn't discard the logs for passed tests until the very end10:37
programmerjakewell, if we're getting beefy hardware, the ryzen 7950x is coming out soon, 5.7ghz10:38
programmerjakelaunches on 9/27/202210:41
programmerjakesept 910:41
programmerjakesept 27, sorry misread10:41
lkcloh btw you saw i updated comment 0
lkclfrickin large list, feel free to prioritise / cut it back (drastically) if necessary10:42
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lkcle.g. leave out the hypot bunch for example, just like in the original proposal, some of them are optional/obscure10:43
* lkcl still feeling completely overwhelmed, haven't got to parallel-reduction or pack-unpack *at all*10:44
lkclISA WG meeting went well today. can't say what was in it, but at least the External RFC Process is now public10:45
lkcl============ 240 passed, 4 skipped, 620 warnings in 852.79 seconds ============10:54 still underway10:54
programmerjakefixed the fpr<->gpr move instructions' semantics:;a=commitdiff;h=b7174adc52b41f12d98f350af00220a39f89586011:01
programmerjakemerging them all into fewer instructions can be done later11:02
programmerjakethough i'll note we really only have 6 instructions: fishmv, fmvis, fmvtg[s][.], fmvfg[s][.], fcvtfg[u][wd][s][.], and fcvt[s]tg[u][wd][.], they all just have a bunch of options -- just like add, add., addo, and addo.11:08
programmerjakewhere [wd] means pick either w or d, and [s] means s is optional for any character s11:09
programmerjakeimho none of those 6 instructions should be merged one of the other 6 instructions, they are all very different operations.11:12
programmerjakethat'd be kinda like trying to merge fmv and add, it just doesn't make sense11:13
programmerjakewe could restructure the page to emphasize how it's really only 6 instructions though, imho we should keep all the different mnemonics though11:14
programmerjakelkcl, read through comment #0 of bug 899, ya missed the atan2[pi] and powers table11:18
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programmerjakei added the atan2[pi] table to comment #011:27
lkclyes 6 is great, 24 is not. they're already freaking out11:55
lkclaliases for the stack of things currently listed.  but as a separate much smaller table, again, to avoid freak-out-overwhelm11:56
lkclgood catch on 2-op table.11:57
programmerjakewell, it's 4am, gn11:57
lkcli updated as well.11:57
lkclnicely done11:57
ghostmansd[m]lkcl, thanks for sorting out the bugs12:19
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ghostmansdIt took me a while to realize why code stopped working with target_addr, and only then I recalled that target_addr no longer exists. :-)12:57
ghostmansdAlready switched to real fields, LI and BD.12:57
lkclghostmansd, :)13:14
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ghostmansdlkcl, you forgot to change svbranch respectively15:36
ghostmansdI know this is WiP, but anyway15:36
ghostmansdI pushed two commits, both shouldn't break anything, but please let me know if you have issues. First commit skips empty operand entries in pagereader, the second replaces svbranch.mdwn target_addr with BD.15:41
ghostmansdBoth changes hold me, and seem like needed in master.15:42
lkclsvbranch? que? what svbranch?16:03
lkclghostmansd, oh - yes.  svbranch.mdwn16:03
lkclgood god, that's actually used? :)16:03
lkclok you did it alrady16:04
lkclyes this is a weird one because ISACaller drops all the XYZ-Form.{opcodes} into the namespace of the function, automatically16:04
lkclso the fact that target_addr was not used is irrelevant16:05
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ghostmansdBasically attracted my attention only because I printed all entries found in mdwn16:12
ghostmansdNothing's broken, but still, for consistency's sake...16:12
ghostmansdRecent updates:
lkclthis would be really *really* useful directly inside ISACaller, which is rather hamstrung.16:23
lkclghostmansd, are you good to do (right now) an addition to the RC Enum?16:26
lkclto add RC.RC_ONLY?16:26
lkclor RC.RC_NO_OE?16:26
ghostmansdWhat'd it mean? addis.?16:26
ghostmansdI mean, what are the cases where it's useful?16:27
lkclthere's an entire list of instructions that need their CSV files to be "RC-only"16:27
ghostmansdAnd how would the disassembly benefit?16:27
lkclit would not make the mistake of reading bit 30 by accident and creating a mullhwo instruction for example16:27
lkclwhich does not exist16:28
lkcland ternlogi is a real basket-case because bit 30 (normally allocated to OE) is part of the XO opcode16:28
ghostmansdHm. IIRC 'o' is present in instruction name.16:28
ghostmansdThat is, we have two entries in mdwn in such cases.16:29
lkclok if you look at class RC16:29
lkclclass RC(Enum):16:29
lkcl    NONE = 016:29
lkcl    ONE = 116:29
lkcl    RC = 216:29
ghostmansdIf you mean stuff like addo16:29
lkclthe column *only* has RC but not OE16:29
lkclthis is a hangover from microwatt16:29
ghostmansdYes, sure. Why RC should consider OE?16:29
ghostmansdThese are different beasts to me.16:29
lkclbecause that's what they did in microwatt16:29
lkclthey coded "RC" to mean "consider RC **AND** OE"16:30
ghostmansdHoly fuck16:30
ghostmansdBut this doesn't look right16:30
lkcl"oh and make some exceptions which you can see in that list exts* cntlz mulhw mulhd etc etc etc16:30
lkclto "fix" that - properly - we need an RC_ONLY=3 in class RC16:30
lkclreally, we should change *both* names, so as to make damn sure that errors occur16:31
lkclclass RC(Enum):16:31
lkcl    NONE = 016:31
lkcl    ONE = 116:31
lkcl    RC_OE = 2    # includes OE16:32
lkcl    RC_ONLY = 3  # does not include OE16:32
lkclyou good with that?16:32
ghostmansdOK, what'd be the matching pattern here?;a=blob;f=src/openpower/decoder/;h=fd9439bb102b49c8d20c4233131e459d57dadac3;hb=7ccf725d657341da5a1ea4e18689f4827b34447c#l84916:32
* lkcl nom, nom, nom...16:32
lkclthat would change to16:32
lkclif record.rc not in [RC.RC_OE, RC.RC_ONLY]:16:32
lkcland then there would correspondingly be an OE_match function16:33
ghostmansdSo we'll handle two cases, RC_OE (Rc and OE) and RC_ONLY (only RC)?16:33
lkclif record.rc is not RC.RC_OE16:33
ghostmansdand not NONE16:33
lkclerr... yes? :)16:34
ghostmansdif rc in (RC.NONE, RC.ONE): return False16:34
ghostmansdOK ping me when you update this bit16:34
ghostmansdI'd keep RC as RC, not RC_ONLY16:35
lkcllet's work in the same branch16:35
lkcli've pushed that one change first16:35
lkcland will start on power_decoder2.py16:35
lkclon DecodeRC and DecodeOE16:35
ghostmansdAlso, RC.RC_OE is strange... we have RC enum, but have OE member there...16:35
lkclsigh yes i know16:36
lkclbut it is better than trying to add a separate column16:36
ghostmansdMaybe call it kinda like Flags or something agnostic?16:36
ghostmansdNo-no, I mean the enum name16:36
lkclwhich will hit literally every... ah yes16:36
ghostmansdI'm terrible at naming16:36
lkclso am i :)16:36
ghostmansdclass MicrowattRcSucks(_enum.Enum): YES_WE_DO_HAVE_OE_AND_RC = 016:37
ghostmansdStill, I'd think about less Rc-centric name16:37
lkcldone - i called it FLAGS for now16:37
lkclit's a good choice because it causes errors16:37
lkclmeaning a *full* code review is needed16:38
ghostmansdFuck fuck fuck16:39
ghostmansdThey have _both_ Rc and RC fields16:39
lkclwhat d'ya'do nooow16:39
lkcluh-huhn :)16:40
ghostmansdSeriously, who was drunk?16:40
lkclRC is the register (GPR) like, RA RB RC RT RS16:40
lkclthere is actually a reason why it's Rc.  something like... Result condition16:40
ghostmansdYeah but still, why not call it like RcBit, at least16:40
lkclthat's 5 letters when 2 will do :)16:41
ghostmansdThings that differ by case... nothing worse.16:41
ghostmansdDoes OE also go into Condition Register?16:41
lkclno - and that's the whole point.16:41
lkclOE is bit *30*16:42
lkclRc is bit *31*16:42
ghostmansdNope I mean the name of the register itself16:42
ghostmansdpg 6016:42
lkcl1 sec16:42
ghostmansdassuming v3.1B16:42
lkclzoom zoom zoom...16:42
ghostmansdMaybe we should call enum CRBits, then?16:43
lkclthose are *also* different.16:43
lkclthe Rc flag indicates *that* you should update a CR Field16:43
ghostmansdFuck yeah16:44
lkclfor GPR operations that is CR016:44
lkclfor FPR operations it is CR116:44
lkcland for VSX operations CR616:44
ghostmansdIt's FP exception register16:44
lkclhas your brain melted yet?16:44
ghostmansdOV and SO16:44
lkclthat's *even another* flag :)16:44
lkclcalled FPSCR i think16:44
lkcland that's *yet another* one - XER16:44
lkclthere is actually a reason for all this btw16:45
lkclRISC-V - which has none of it - is absolutely fucked16:45
lkclexample: MIPS (which also doesn't have these Condition Codes) has to use **TEN** MIPS instructions to emulate a single x86 branch16:45
ghostmansdHoly cow16:46
lkcland RISC-V is in the same mess.16:46
ghostmansdhow about RegBits name?16:46
lkcli just called it FLAGS for now16:46
ghostmansdFLAGS is waaaay too broad16:46
lkclthe name can change later, i want to hit the... true...16:46
ghostmansde.g. PPC records do also have flags (e.g. lk)16:46
lkclthen i'm tempted to just call it RCOE for now16:46
ghostmansdif "lk" in ppc.flags16:47
ghostmansdHm... This might do the trick.16:47
ghostmansdOK let's leave it to strangers who see this code to blame us later.16:47
lkcl;a=shortlog;h=refs/heads/rc_only16:47 done16:48 done16:48 done16:48
lkclrenamed in done16:49
lkcl(not added the missing case(s) though)16:49
lkclwhoops had to add the missing case name16:51
lkclahh frick16:51
lkclcase RC currently does not exist any more in the CSV files, doh16:51
lkclfrick frick frick that means hitting all the csv files which i wanted to avoid, renaming RC to "RC_OE"16:52
lkclah well16:52
lkclfuckit might as well16:52
lkclarse feck no can't do that16:53
lkclgit pull16:54
lkclso that's16:55
lkclclass RCOE(Enum):16:55
lkcl    NONE = 016:55
lkcl    ONE = 116:55
lkcl    RC = 2    # includes OE16:55
lkcl    RC_ONLY = 3  # does not include OE16:55
lkclwhere (2) is for compatibility to avoid a massive hit on the CSV files, renaming absolutely every sodding line ,RC,0,fmsub,A16:55
lkclto ,RC_ONLY,0,....16:55
lkcldeep breath, deep breath16:56
lkcldang this might turn out to be a lot easier than i was nervous about16:58
lkclno test_caller errors so far16:59
* lkcl might as well run the whole lot17:00
lkcland in the meantime edit the CSV files17:00
lkclghostmansd, i found another op with a pair of switch/case entries17:02
ghostmansdYeah IIRC I haven't handle it yet17:02
lkcli'll make that a single entry17:03
lkclbecause otherwise you end up only matching the [overwriting] one pattern17:03
ghostmansd...or did I?...17:03
ghostmansdlet me check17:03
lkcloh... err... arg.  the entire csv file - minor_31.csv - has to convert to patterns, it is currently binary.17:04
lkcli'm not doing that17:04
ghostmansdThis has _completely_ duplicated entries17:05
ghostmansdI guess it was automatic, eh?17:06
ghostmansdPerhaps we should filter out duplicates17:06
lkclit'll have duplicate entries because it matches against multiple thingies.  multiple instructions17:06
lkclbtw "stwcx." can *only* have "." at the end, you know that, right?17:07
ghostmansdlkcl you'll be surprized17:09
ghostmansdat least I was17:09
lkcldaaang i'm finding a whooole stack of bugs17:09
ghostmansddoes extswsli have dotted version?17:09
lkcloperations that should have never been just "RC" in the CSV files17:09
ghostmansdbecause it appears it it does17:10
lkclbut not an OE=1 version17:10
ghostmansdand, well, considering different patterns...17:10
ghostmansdit makes 4 instructions, eh?17:10
lkclextswsli is now an RC_ONLY in the CSV17:10
lkclsigh yes17:10
* lkcl manic laughter17:11
lkclf*****g fp operations are all RC as well17:12
lkclok got a batch ready, just waiting for unit tests to run... done17:13
lkclok done, pushed17:16
lkclnow comes the "risky" part (for me) - removing the case statement in DecodeOE17:17
lkcleverything *should* still run17:17
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lkclya know... in some ways this RCOE flag is a duplicate of what's in the mdwn.17:19
lkcl(Rc=1, OE=1)17:20
lkclbut let's not go there right just now17:20
* lkcl restarted all test_caller*.py17:21
lkclwith now "listening" to the RCOE.RC_ONLY flag back in power_decoder2.DecodeOE17:21
ghostmansdWhy couldn't we have pattern 110111101-?17:22
lkclyep they're identical except for the op17:22
lkclbecause you have to change the *entire* minor_31.csv in one hit17:22
lkcland i don't want to do that in this branch17:23
ghostmansdMy point is, this should solve the issue with handling instructions that have multiple opcodes but otherwise are the same.17:24
ghostmansdWithout introducing stuff like "list of opcodes"17:24
lkclyeeEes... but until the list-of-opcodes (or an amalgamation function written) i can't do svshape217:25
lkclor i can but what you're doing will break17:25
ghostmansdOK, alternative suggestion17:25
ghostmansdWe have PatternOpcode17:25
ghostmansdused for stuff like 0-11-01117:26
ghostmansdWe could perhaps have a constructor or subclass of it17:26
ghostmansdWhich takes several "fixed" opcodes17:26
lkcli think i know what you're going to say17:26
ghostmansd...and then builds such PatternOpcode17:26
lkclit's actually really easy to do17:27
ghostmansdLength of fields is the same...17:27
lkclfor i in range(32)17:27
lkcl  bit = 1<<i17:27
ghostmansdNot really 3217:27
ghostmansdBut yes17:27
ghostmansdWell 32 would also do the trick17:27
lkcl  for pattern in list_of_patterns:17:27
lkcl     if bit same in all patterns:17:27
lkcl        result[bit] = 117:27
lkcl       mask[bit] = 117:28
lkcl    result[bit] = incoming[bit]17:28
ghostmansdHell L-)]17:28
lkclyou get the idea17:28
ghostmansdOK, kinda similar to what's going on here for mask17:28
ghostmansdBut this time for multiple opcodes in one go17:28
ghostmansdOK I'll think how to handle it better17:29
ghostmansdI think I'll be able to complete it soon17:29
lkclit would work well because it means no need to hit all the CSV files with a new colummn17:29
lkcland we can stop removing the bloody duplicates, too :)17:29
* lkcl afk for a bit, need to get up. tests still running in rc_only branch17:30
lkcldang loadavg 25...17:30
ghostmansdOK, so, considering two integer opcodes, A and B. If A[N] == B[N], what'd be VALUE[N] and MASK[N]? What if A[N] != B[N]?17:36
ghostmansdI guess if not equal, this is -, right?17:37
ghostmansdAnd, if equal, this is the bit value?17:37
lkclif "-" then it is still "-"17:44
lkclif not equal then it is also "-"17:44
lkclonly those bits that *all* match go into the thing17:44
lkcli know17:44
lkclfirst_pattern = list_of_patterns.pop(-1)17:45
lkclfor pattern in list_of_patterns:17:45
lkcl   if first_pattern[bit] != pattern[bit]:17:45
lkcl     mask[bit] = 0; continue17:45
lkclmask[bit] = 117:45
lkclresult[bit] = first_pattern[bit]17:46
lkclthat's it17:46
lkcldang unit tests passed17:46
* lkcl re-running test_issuer.py17:46
ghostmansdTo me it looks strange that the first opcode is somehow "special".18:09
ghostmansdI'm thinking of a bit different approach which applies the same operation in chain...18:09
ghostmansdStay tuned.18:09
lkcli missed rwlin* (OP_RLCR) so am re-running nosvp64 shiftrot18:12
ghostmansdOK, good news is, at so called "PPC database", we have these entries separated18:17
ghostmansdThat is, we end up with say 2 records both named extswsli18:18
lkclthat's a good start18:18
* lkcl shiftrot error gone18:18
ghostmansdI really like dataclasses: they generated the __eq__ and __hash__ for us so that if even a single entry differs these are different18:18
lkcloh, ah, err...18:19
ghostmansdAnd I luckily stored these dataclasses of PPC records in set18:19
lkcli meant to mention18:19
* lkcl sheepish18:19
ghostmansdAnd, well, it found the opcodes to be different18:19
lkclyou know when an early version you had a list of fields as a dictionary?18:19
lkcloh that's good, what was it? which ones? i need to check them18:19
ghostmansdPPCRecord(opcode=IntegerOpcode(value=0x0000037b, mask=0x0000037b), comment='extswsli', flags=Flags({'BR', 'rsrv', 'inv A', 'inv out', 'sgn', 'lk', 'cry out', 'sgl pipe', 'sgn ext', '32b'}), comment2='', function=<Function.SHIFT_ROT: (1 << 3)>, intop=<MicrOp.OP_EXTSWSLI: 32>, in1=<In1Sel.NONE: 0>, in2=<In2Sel.CONST_SH: 10>, in3=<In3Sel.RS: 1>, out=<OutSel.RA: 2>, cr_in=<CRInSel.NONE: 0>, cr_out=<CROutSel.CR0: 1>, cry_in=<Cr18:20
ghostmansdyIn.ZERO: 0>, ldst_len=<LDSTLen.NONE: 0>, upd=<LDSTMode.NONE: 0>, rc=<RC.RC: 2>, form=<Form.XS: 16>, conditions='', unofficial=False)18:20
ghostmansdPPCRecord(opcode=IntegerOpcode(value=0x0000037a, mask=0x0000037a), comment='extswsli', flags=Flags({'BR', 'rsrv', 'inv A', 'inv out', 'sgn', 'lk', 'cry out', 'sgl pipe', 'sgn ext', '32b'}), comment2='', function=<Function.SHIFT_ROT: (1 << 3)>, intop=<MicrOp.OP_EXTSWSLI: 32>, in1=<In1Sel.NONE: 0>, in2=<In2Sel.CONST_SH: 10>, in3=<In3Sel.RS: 1>, out=<OutSel.RA: 2>, cr_in=<CRInSel.NONE: 0>, cr_out=<CROutSel.CR0: 1>, cry_in=<Cr18:20
ghostmansdyIn.ZERO: 0>, ldst_len=<LDSTLen.NONE: 0>, upd=<LDSTMode.NONE: 0>, rc=<RC.RC: 2>, form=<Form.XS: 16>, conditions='', unofficial=False18:20
lkclextswsli... 1 sec...18:20
ghostmansdCorresponds to these18:20
lkclthose aren't different18:21
ghostmansdThey are18:21
ghostmansdcheck opcodes18:21
lkclthat's "expected"18:21
ghostmansd0b1101111010 vs 0b110111101118:21
lkcl(as in, we expect them to be different)18:21
ghostmansdI mean that the code could have dropped one entry18:21
ghostmansdBy mistake or whatever18:21
ghostmansdBut, due to the fact these are represented as dataclasses18:22
ghostmansdnot some dict grouped by name...18:22
lkclbecause this was originally designed for naive switch case-statements (multiple of, potentially, doing the same thing)18:22
ghostmansd...this works18:22
lkclsigh yes18:22
ghostmansdSo this is a good start18:22
ghostmansdI worried I was collecting these by name18:22
ghostmansdOr, well, comparing, at least18:22
ghostmansdBut not18:22
ghostmansdI compare the whole entries18:22
ghostmansdSo neither entry is missed18:22
ghostmansdAnd we simply have to merge entries with same name and different opcodes into a single entity18:23
ghostmansdWith a pattern opcode18:23
ghostmansdgenerated on the fly18:23
lkclso, ah, a reminder of the sheepish-thing i forgot to say18:26
lkclyou know how we have fields.text for 32-bit ops?18:26
lkcland how Power ISA v3.1 64-bit prefix format is also done the same way in the Power ISA v3.1 doc?18:26
lkclit occurred to me that the entirety of SVP64 really has to be done the same way - as a (new) fields_svp64.txt file18:27
lkcli can hear you banging your head on the keyboard from here...18:27
ghostmansdWell practically speaking yes :-)18:27
ghostmansdCannot it wait until I'm done with objdump at least? :-)18:28
ghostmansdFuck the whole thing is also complicated by the fact that some entries in PPC database have _multiple_ names18:29
ghostmansdOK, never surrender, eh?18:29
ghostmansd_collections.defaultdict(lambda: _collections.defaultdict(set))18:33
ghostmansdAnybody stumbling at this code would think I'm a fucking pervert18:33
ghostmansda default dict of default dict of sets18:33
lkclof course.18:34
lkclit is a long-term thing18:34
lkclfor which we can plan a decent budget18:35
lkclbut... it's like... why the bloody hell didn't that occur to me like.... weeks ago18:35
lkclok i'm happy with the rc_only branch18:40
lkcl(tests, etc)18:40
lkclwhat do i need to run to check s...tuff breaks?18:41
lkclor shall i just cut it over to master?18:41
ghostmansd[m]You can cut it; I'll handle power_insn changes, and check pysvp64dis18:56
ghostmansd[m]Eventually I will do tests for pysvp64dis, too18:57
ghostmansd[m]But I'd like to land there after binutils. First, there are time concerns; second... Who knows, perhaps we could have some tests for them together?18:57
ghostmansd[m]I've been thinking that asm tests could use the same input, at least. Not sure how to handle it better, though, due to different repos.18:58
ghostmansd[m]Anyway timewise I cannot afford such a luxury; plus, things still evolve.18:59
ghostmansdlkcl, can we have a pathological situation when not only opcode differ, but other fields, too?19:11
ghostmansdI'm asking since I have no better means to group instructions other than by opcode or name.19:11
ghostmansdBut, if we have several entries for the same name (or, well, comment), with different opcodes AND different other fields...19:12
ghostmansd...I don't know how to rule this out. These should be different instructions, then,19:12
ghostmansdI'm thinking of raising the exception, if I meet such bastards. Thoughts?19:12
ghostmansdHere's the exhaustive (if I'm not mistaken) bastards list: extswsli isel mulhd mulhdu mulhw mulhwu sradi19:25
lkclno absolutely not - that's a hard error19:57
lkclunder no circumstances should the fields be different for the same instruction name19:58
lkclthat list sounds about right19:58
lkclmost of those can be resolved to single-entries (eventually) by first doing the "convert-the-entire-file-to-pattern" trick19:59
lkclbut let's use them all as a test of the pattern-matching19:59
lkcloctavius, ping you should have received payment, do check your bank account and update the bugreports20:05
lkclprogrammerjake, likewise, payments went out yesterday20:07
programmerjakedidn't show up in my bank yet...they're kinda slow20:12
lkclEU-US transfer, yes.20:15
lkclEU/UK it'll be by CHAPS - pretty much instant20:15
ghostmansdextswsli RA,RS,SH (Rc=0)20:46
ghostmansdEverything's great, but you know what? The listing below mentions sh in lowercase.20:47
ghostmansd# 1.6.15 XS-FORM20:47
ghostmansd    |0     |6    |11    |16    |21    |30|31 |20:47
ghostmansd    | PO   |  RS |   RA |   sh |   XO |sh|Rc |20:47
ghostmansdpg 142 of 3.1B20:48
ghostmansdFor fuck's sake, I had to check into this for about an half an hour until I realized that they differ only by the _case_20:48
ghostmansdSo yeah, extswsli is marked as XS-form20:49
ghostmansdbut has SH argument20:49
ghostmansdand there's no SH operand, only _sh_, lowercase, donnerwetter!20:49
ghostmansdObviously it should have been uppercase20:49
ghostmansdsh (30,16:20)20:50
ghostmansdSH (16:20)20:51
ghostmansdlowercase sh has only one span, and that includes bit 3020:51
ghostmansdoh well20:51
ghostmansdnope, it should be lowercase20:51
programmerjakethe latest in crazy usb standards naming: usb4 version 2.0, makes me wonder how long it'll be for them to have version UsB70.79.79.76 ("FOOL" in ascii)20:51
ghostmansd|0     |6    |11    |16    |21    |30|31 |20:52
ghostmansd    | PO   |  RS |   RA |   sh |   XO |sh|Rc |20:52
ghostmansdYes indeed, lowercase, bit 30 is also occupied20:52
ghostmansdyes this change makes it work20:54
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ghostmansd^ the change for extswsli operands20:55
ghostmansd^ support opcodes merging20:56
ghostmansdtoo tired, will check your remarks later20:56
programmerjakea bunch of import errors in tests in CI:
programmerjakeImportError: cannot import name 'RC' from 'openpower.decoder.power_enums' (/builds/Kazan-team/mirrors/openpower-isa/src/openpower/decoder/
ghostmansd[m]lkcl, I would like to raise an errand to OPF20:59
ghostmansd[m]Is it doable? This is second error I spot, the previous one with target_addr, which you raised first. :-)21:00
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lkclghostmansd, yes i can do that.21:28
lkclor, now you can raise an External RFC / minor correction, yourself, if you like21:28
lkclyou want radio-button (1)21:29
lkcli will raise the bugreport internally anyway, i'll be fascinated to see what happens21:29
programmerjakesince the spec. source isn't yet public, i'd assume you don't need a git patch, and should just describe it or something21:35
lkclprobably.  or just attach the libresoc git diff :)21:37
programmerjakelkcl: imho you should try to ensure specific git commits are in gitweb urls, rather than linking to HEAD, because that way the urls still work when reading irc again later21:59
octaviuslkcl, payment did come through, updated the bugs and wiki page22:25
octaviusAlso making progress on the manual pinmux demo (src/spec/ Have tests for very dumb UART/I2C/GPIO (no logic, just signal transitions), to test the connectivity between the periph side and the pads. The pad names are now a parameter (as a list), however the code itself is not parametrised yet. Although it's starting to make more sense. Also haven't done the pretty gtkwave file yet22:53
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octaviuscurrently I'm thinking of the dict/indexing. The pads dict contains the pads (accessible by user-specified name)22:59
octaviusbut we want the pad dict to point to the peripherals?23:00
octaviusfor example, pads['N1']['bank0'].i/o/e23:01
octaviusalthough this doesn't include the peripheral information23:01
octaviusI guess each 'pad' entry could contain the dict of bank0-3 and the actual pad Records23:02
octaviuspads['N1'] = {'bank0':Record,... 'bank3':Record, 'pad':Record}23:03
octaviusI'll continue tomorrow, gn23:05
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