Saturday, 2022-09-10

*** octavius <octavius!> has quit IRC01:21
*** lx0 <lx0!~lxo@gateway/tor-sasl/lxo> has quit IRC04:42
*** lx0 <lx0!~lxo@gateway/tor-sasl/lxo> has joined #libre-soc04:49
*** ghostmansd <ghostmansd!> has joined #libre-soc05:39
ghostmansdaddpcis is not present in our CSVs05:49
ghostmansdlkcl, do we support sv.fmvis, sv.fishmv? If so, how the remapping happens?06:37
ghostmansdAh wait I see. D does not participate in remap.06:38
*** ghostmansd[m] <ghostmansd[m]!> has quit IRC07:46
*** ghostmansd[m] <ghostmansd[m]!> has joined #libre-soc07:49
*** ghostmansd[m] <ghostmansd[m]!> has quit IRC07:57
*** ghostmansd[m] <ghostmansd[m]!~ghostmans@> has joined #libre-soc07:59
*** ghostmansd[m] <ghostmansd[m]!~ghostmans@> has quit IRC08:05
*** ghostmansd[m] <ghostmansd[m]!> has joined #libre-soc08:06
*** ghostmansd[m] <ghostmansd[m]!> has quit IRC09:29
*** ghostmansd[m] <ghostmansd[m]!~ghostmans@> has joined #libre-soc09:30
lkclcorrect, D is an immediate09:52
lkclno immediates ever go through REMAP, only registers09:52
*** octavius <octavius!> has joined #libre-soc11:38
ghostmansd[m]Yeah I reqlized but still I decided not to inherit it from immediate (ImmediateOperand has a special meaning for stuff like D(RA)). Perhaps later I'll think how to circumcent this quirk.11:38
*** ghostmansd[m] <ghostmansd[m]!~ghostmans@> has quit IRC12:04
lkclghostmansd, tests all good, rebased dis to master12:13
*** ghostmansd <ghostmansd!> has quit IRC12:55
*** ghostmansd[m] <ghostmansd[m]!> has joined #libre-soc12:57
*** octavius <octavius!> has quit IRC13:10
*** ghostmansd <ghostmansd!> has joined #libre-soc13:43
*** josuah <josuah!~irc@> has quit IRC13:52
*** josuah <josuah!~irc@> has joined #libre-soc13:53
ghostmansdlkcl, I almost ready to surrender :-)14:00
ghostmansdThis is how they do it in binutils:;a=blob;f=opcodes/ppc-dis.c#l58914:01
ghostmansdBut they also seem to play tricks with ordering inside the table.14:02
ghostmansdOK, if I add an explicit PO matching along with mask checks, isel matches, checking others.14:07
ghostmansd...but others fail.14:12
ghostmansdBecause multiple instructions can have same XO, right, obviously.14:12
ghostmansdOK got another idea14:17
lkclyep, it's those multi-entry switch/case statements14:47
*** josuah <josuah!~irc@> has quit IRC14:48
lkclit's called the "Quine-McCluskey" algorithm :)14:49
lkcloo, oo, i have to try it out14:49
*** josuah <josuah!~irc@> has joined #libre-soc14:51
ghostmansdOK; Opcode.value and Opcode.mask are what we get from 0s and 1s.14:52
lkcldoes exactly what is expected.15:01
lkclreduces isel down to a single entry15:01
lkclfails to reduce svshape.  finds three *really* interesting patterns, but still fails to get them down to one.  which is expected.15:02
lkclactually, this is a really important algorithm for us to use in nmigen15:02
lkclbecause it too ends up creating massive verbose switch/case statements15:03
lkclthat are in desperate need of reduction15:03
ghostmansdI don't understand how to adopt it to the existing code. I can make Opcode class produce such bitvector, but what next?15:05
lkclif the resultant list is only one long, the result is both the value and the mask15:08
lkclsimpler than that15:09
lkclthat's it15:09
lkclopcode class to produce a *list* of bitvectors15:10
ghostmansdThis matches multiple instructions15:20
ghostmansdAnd this matches the current behaviour.15:20
lkclyes. except it's automatic.15:21
lkclit doesn't need "special explicit hard-coded PO matching along with mask checks, isel matches"15:22
ghostmansdWhat do you mean by automatic? There's an algorithm involved.15:22
lkclit automatically and inherently identifies *all* reduction opportunities15:22
lkclyou do not need code:15:22
ghostmansdMy question is, how to match?15:22
lkcl* if == "isel" ...15:22
ghostmansdThere's no such code.15:22
ghostmansdAnd won't be ever.15:23
lkcloh goodie :)15:23
ghostmansdWe already discussed that, I'm trying to approach it in general.15:23
lkclif isinstance(PPCMultiRecord):15:23
lkcl    get_pattern_list(...)15:23
lkcl    new_patterns = quine.compress()15:24
ghostmansdThe issue is that, multiple instructions are matched when I try to apply if ((value & mask) == (opcode & mask)).15:24
*** octavius <octavius!> has joined #libre-soc15:24
ghostmansdAnd I don't understand how replacing value:mask pair with a bitvector is going to help.15:24
lkclyou'll need to do exactly the same thing that i already did in the decoder/power_table.py15:24
ghostmansdBecause this is the same to me.15:24
lkcl*BEFORE* you create the Fields-things-with-a-list15:24
lkclremember i explained how i needed *only* the *direct* CSV file information?15:25
lkclif isinstance(PPCMultiRecord)15:25
lkclreduce to one15:25
lkclreplace PPCMultiRecord15:25
lkcli think you'll find you need to call the quine.compress() function *before* you do the trick which creates that list15:28
lkcl(including the 6-bit PO)15:28
lkclyou remember?15:28
lkclsomething about adding bits 0-5 to a list15:28
lkclthen adding the CSV entry15:28
lkclthen something else15:29
lkcland finally passing that *list* over to a function that turns it into a value&mask / opcode&mask thing15:29
lkcllike the decoder/power_table.py15:29
lkclyou MUST15:29
lkclcall quine.compress()15:29
lkclon the RAW15:29
lkclCSV data15:29
lkclafter the creation of the 0xNNNN_NNNN mask and 0xNNNN_NNNN value15:30
ghostmansdThanks! I'll think about how to do it.15:31
ghostmansdStill don't understand why we need it, binutils don't.15:32
lkclbecause you ran into a matching problem15:32
lkcland because binutils is entirely hand-crafted15:32
lkclthey can do hand-crafted tricks as workarounds for matching problem(s)15:33
ghostmansdYou won't believe but I did it!15:52
ghostmansdBut w/o Quine algorithm yet15:53
ghostmansdI need more tricky cases. I managed to match isel and svshape and svshape2.15:54
ghostmansdThere were errors in the algorithm. First, we never really correctly handled integer patterns, they always led to wrong mask. Second, major.csv and extra.csv with opcode=0 needed a special treat.16:06
lkclah yes major/extra special-case sounds familiar16:07
lkclrldic* _were_ some that existed, but no more16:08
lkclsvshape2 is the worse offender16:08
ghostmansdAh heck wait, just realized the worse offender is still here. Checking this. :-)16:11
ghostmansdDamn :-)16:12
ghostmansdYeah I know how to deal with it. We must check XO along with the other static operands.16:22
ghostmansdThe thing is, we don't have XO field... :-)16:22
ghostmansdBut it's simple to support. Basically what we have in opcode already has XO, just not in explicit form.16:23
lkclhence why i suggested at the CSV-file level because there is no conflict there16:45
lkcl(not with other CSV files)16:45
ghostmansdlkcl, I checked the script, and still cannot get how the match is performed.18:20
ghostmansdShould I match with each pattern in list?18:21
ghostmansdsvshape ['0----011001', '1-1--011001', '110--011001']18:21
ghostmansdsvshape2 ['100--011001']18:21
ghostmansdI think I begin to understand...18:34
ghostmansdI think I can do somewhat simpler: this multirecord should have entries obtained via this algorithm.18:35
lkclthe multirecord contains the patterns that must be handed *to* the quine algorithm18:37
lkcltry it with the isel patterns (you can see i extracted them from the isel CSV)18:37
ghostmansdsvshape has 28 matches, svshape2 has 4 matches, but none are common18:38
ghostmansdThis is actually the same as iterating over records WITHOUT merge18:44
ghostmansdThis code is superior wrt compactness18:44
ghostmansdBut otherwise it's the same18:44
ghostmansdWith the exception that the current algorithm also takes Rc and Oe into account (but that one can also be adopted upon pattern build).18:49
ghostmansdlkcl, pushed19:18
ghostmansdOK now back to CRs19:21
ghostmansdlkcl, about CRs. I saw in spec and you told that there are 5-bit and 3-bit, I also recall it from pysvp64asm. But I cannot find the code in src/openpower/decoder/ which takes care of it.19:36
*** octavius <octavius!> has quit IRC19:53
ghostmansdlkcl, note aside: I think at some point we'd like to have script called insndb, which takes opcodes or names as arguments20:18
ghostmansdAlso I noticed that "database" takes about 1 second to load; this is a huge time, and we should strive to make it less. But not now.20:19
ghostmansdOh by the way I know one trick to lookup opcodes faster. Stay tuned.20:20
ghostmansdOK done, plus another minor optimization.20:40
ghostmansdEnough for today, completely exhausted, but I hope at least this works.20:40
*** ghostmansd <ghostmansd!> has quit IRC20:44
*** octavius <octavius!> has joined #libre-soc20:57
*** lx0 <lx0!~lxo@gateway/tor-sasl/lxo> has quit IRC21:15
*** lx0 <lx0!~lxo@gateway/tor-sasl/lxo> has joined #libre-soc21:17
lkclghostmansd[m], yes, i need to enumerate insndb in the decoder/power_table.py21:43
lkclyes i was already asleep for a couple of hours :)21:43
ghostmansd[m]What do youean by enumerate?21:43
ghostmansd[m]for (idx, record) in db?21:43
lkclor at least get at the start/end point21:44
lkcland separate everything out - i do a full walk to split by insn.section.path.name21:44
ghostmansd[m]insn.ppc has all PPC records (those from minor_XX.csv, major.csv, extra.csv, etc.)21:45
ghostmansd[m]insn.svp64 has stuff from LDSTRM tables21:45
ghostmansd[m]insn.mdwn has stuff from mdwn files (not all, currently only pcode and operands)21:46
lkclyep i have partly forgotten how works already :)21:46
ghostmansd[m]Ah OK21:46
ghostmansd[m]Please check about CRs when you have the time21:47
ghostmansd[m]Copying here for convenience21:47
ghostmansd[m]lkcl, about CRs. I saw in spec and you told that there are 5-bit and 3-bit, I also recall it from pysvp64asm. But I cannot find the code in src/openpower/decoder/ which takes care of it.21:47
ghostmansd[m]This is stuff I'm going to do tomorrow.21:47
lkcli cheated, remember?21:47
lkclbecause they are identical except for the bottom 2 LSBs21:48
lkclfor 5-bit i chopped off the 2 LSBs21:48
lkclran through the same  SVP64CRExtra class21:48
lkclthen put the 2 LSBs back on afterwards21:48
ghostmansd[m]Yes, this is the part I want to check21:49
ghostmansd[m]Where are these chopped?21:49
lkclbottom 2 LSBs.21:49
ghostmansd[m]Ah so you simply take 0, 1, 2?21:49
ghostmansd[m]Ok gotcha21:50
lkclin MSB0 numbering21:50
lkclyou should even be able to have the same function process both21:50
lkclby spotting "if len(x) == 5" CHOP21:50
ghostmansd[m]Ok I'll check21:52
ghostmansd[m]Anyway this _should_ take less than GPR/FPR... Can I hope at least for this? :-D21:53
lkclit should do because it's practically the same21:54
lkclexcept the shift amounts.21:54
lkclcompare SVP64CRExtra and GPRExtra, really those amounts should be parameterised with common code21:54
lkcl            # Vector: shifted up, extra in LSBs (RA << 2) | spec[1:2]21:55
lkcl            # Vector: shifted up, extra in LSBs (CR << 4) | (spec[1:2] << 2)21:55
lkcl            # Scalar: not shifted up, extra in MSBs RA | (spec[1:2] << 5)21:55
lkcl            # Scalar: not shifted up, extra in MSBs CR | (spec[1:2] << 3)21:55
lkcli mean, duh, how hard is that? :)21:55
ghostmansd[m]Duh, how hard is matching the opcode? :-)21:57
ghostmansd[m]But OK21:57
*** octavius <octavius!> has quit IRC22:46

Generated by 2.17.1 by Marius Gedminas - find it at!