| lkcl | lkcl@fizzy:~/src/libresoc/openpower-isa$ git rebase dis | 00:24 |
|---|---|---|
| lkcl | Successfully rebased and updated refs/heads/master. | 00:24 |
| lkcl | lkcl@fizzy:~/src/libresoc/openpower-isa$ git pull | 00:24 |
| lkcl | dropping b14eaa812791aa6c089bffcfa726a467c175ed8b test_pysvp64dis: fix operands -- patch contents already upstream | 00:24 |
| lkcl | dropping 53c6d8e917b8737ede67e54727727ee6e430e164 add fptrans support to isa caller -- patch contents already upstream | 00:24 |
| lkcl | dropping ff9edd40c880c990edb1ca4e54571870bbf3fa2c correct assrmbler in test_pysvpy4dis.py -- patch contents already upstream | 00:24 |
| lkcl | Successfully rebased and updated refs/heads/master. | 00:24 |
| lkcl | oo-er | 00:24 |
| lkcl | tests passed. rebased. a bit of fun on commits already in. er. | 00:25 |
| lkcl | damn damn damn we need an "svmgmt" instruction | 01:24 |
| lkcl | aka "mtspr" | 01:24 |
| ghostmansd[m] | Ok at least it works :-) | 05:17 |
| ghostmansd[m] | I'll check SPRs after 899 | 05:18 |
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| lkcl | yes. | 12:51 |
| lkcl | ack | 12:51 |
| lkcl | you'll love this - we need a 32-bit "svmgmt" instruction which sets pack/unpack bits in SVSTATE. | 12:52 |
| lkcl | whennnn does the pack/unpack saga ennnd | 12:53 |
| lkcl | ok i have a temporary hack, drop it into "svstep" instead. it's 2 bits | 13:06 |
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