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| programmerjake | found something interesting: https://antmicro.com/blog/2021/09/fpga-interchange-format/ | 03:20 |
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| octavius | Thanks for sharing programmerjake, very interesting read | 08:39 |
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| sadoon[m] | Interesting indeed | 15:35 |
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| ghostmansd | lkcl, sorry, but everything you said about FF mode for CR ops and the CR being read from field is incorrect as it stands in code. | 17:07 |
| ghostmansd | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/sv/trans/svp64.py;h=c61e92833d696d46c50bf715c898b33a3100aa49;hb=HEAD#l1429 | 17:07 |
| ghostmansd | I repeat: please fix either the spec or the code. | 17:08 |
| ghostmansd | If the spec is correct, then tests as they stand, say test_pysvp64dis, should not work. | 17:08 |
| ghostmansd | For now, I'm doing it the same way as svp64 does, and leaving a huge pile of FIXME. | 17:09 |
| ghostmansd | Sorry, I'm fed up with it, and have no patience discovering the rationale between spec/code inconsistencies. | 17:09 |
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| lkcl | ghostmansd, give me a second to look at it | 17:45 |
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| lkcl | the spec is correct - sv/trans/svp64.py may be behind | 17:46 |
| lkcl | i've only spent approx... 4 (if that) days on cr_ops | 17:46 |
| lkcl | whereas the rest is 6+ months | 17:46 |
| lkcl | 1421 elif failfirst is not False and is_cr: | 17:47 |
| lkcl | 1422 if failfirst in ['RC1', '~RC1']: | 17:47 |
| lkcl | yep that is definitely wrong: there cannot be and there never will be ff=RC1 | 17:48 |
| lkcl | if i remember correctly i needed a cr_op mode for something and did a quick hack, which prompted a review (which i told you about a couple days ago) | 17:49 |
| lkcl | but then got pulled to other things | 17:49 |
| lkcl | feel free to rip those lines out completely and replace them with a correct implementation of the spec. | 17:49 |
| lkcl | if you want me to do it, i'll need a few hours... call it 1/2 a day, just to make sure. | 17:51 |
| ghostmansd | For now my intention is to make tests work. | 17:52 |
| ghostmansd | Anything else is to be addressed later. | 17:52 |
| ghostmansd | I already spent way too much time at this task. It turned out way more complex than I really expected. | 17:53 |
| ghostmansd | At least we now have something for fields to be autogenerated, though. | 17:53 |
| ghostmansd | Do we have a meeting today? | 17:53 |
| lkcl | no - in 2 weeks time | 18:02 |
| lkcl | excellent | 18:02 |
| lkcl | well, there is plenty of room to increase budgets | 18:02 |
| lkcl | "making tests work" is a great 1st step, not taking on too much at once | 18:02 |
| lkcl | paul is back only yesterday, i figured it wise to give him a couple weeks before we start back up again. | 18:03 |
| programmerjake | there is a meeting next tue, so 6 days not 14 | 18:03 |
| programmerjake | yeah | 18:03 |
| lkcl | so.... wed 25th. | 18:04 |
| lkcl | yes just checked | 18:04 |
| ghostmansd | Aha, OK, good. Thanks! | 18:05 |
| programmerjake | that's the next wed meeting, the next meeting (that i attend) is next tue | 18:05 |
| ghostmansd | I guess the next big task will be "generate the code for specifiers and decode" via some config. I've extended our tables with fields validation and checks for fields. However, all these fields are done manually, and this should be generated from configuration instead. | 18:08 |
| ghostmansd | No idea yet how to make this configuration in a good form yet. Especially the crap around CR ops which are completely mad. | 18:08 |
| ghostmansd | Is it correct that master CI is broken too? | 18:10 |
| ghostmansd | I see an error for two tests in test_pysvp64dis: test_26_sv_stq_vector_name and test_4_sv_crand. The last one I know how to fix; the former is, wel... interesting. | 18:11 |
| ghostmansd | https://salsa.debian.org/Kazan-team/mirrors/openpower-isa/-/jobs/3729594 | 18:11 |
| ghostmansd | Here's what we have on master... | 18:12 |
| ghostmansd | $ echo "sv.stq *4,16(*5)" | SILENCELOG=true pysvp64asm | 18:12 |
| ghostmansd | .long 0x05400500; stq *4, 16(1) # sv.stq *4,16(*5) | 18:12 |
| ghostmansd | This is being fixed in insndb branch, I'm investigating it, but I wonder whether it worked before | 18:14 |
| programmerjake | yes, master ci is broken due to luke deciding it's ok to leave tests broken for a while for things that are being newly added | 18:26 |
| programmerjake | iirc | 18:27 |
| programmerjake | generally what i do is ensure i don't break any tests that were not broken before i modified stuff | 18:28 |
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| ghostmansd | OK, about stq. The insndb branch now produces the code `.long 0x05402500; stq 1,16(1) # sv.stq *4,16(*5)`, which seems to be better and more correct. However, this yields another issue with binutils. | 18:49 |
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| ghostmansd | Stupid IRC, sigh | 18:49 |
| ghostmansd | `/tmp/insndb.s:1: Error: operand out of domain (1 is not a multiple of 2)` | 18:49 |
| ghostmansd | It seems there's an error upon operand remapping. | 18:52 |
| programmerjake | the error is that the operand can be encoded but the suffix insn is an illegal encoding -- it works just fine as a svp64 op tho since the register num gets rewritten | 18:53 |
| programmerjake | seems like a special case that should output .long for the suffix | 18:54 |
| programmerjake | same thing for all other register pair operands | 18:55 |
| ghostmansd | Hmmmm.... | 18:56 |
| ghostmansd | Well I could add a trick into pysvp64asm for that | 18:58 |
| ghostmansd | Thanks programmerjake! | 18:58 |
| ghostmansd | We now have a separate style which outputs "backward-compatible disassembly" (that is, a pair of .long and remapped insn, as it used to be) | 18:59 |
| ghostmansd | So I guess this is the only one affected | 18:59 |
| programmerjake | everywhere there's a register pair operand should have the same issue, not just stq | 19:00 |
| ghostmansd | Yep, I'm checking the list in fields.txt | 19:11 |
| ghostmansd | There's quite a lot | 19:11 |
| ghostmansd | 6 operands overall | 19:13 |
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| ghostmansd | Holy cow, finally the whole disassembly test works! | 20:45 |
| ghostmansd | lkcl, I think I found what got wrong with fail-fist on CRs | 20:46 |
| ghostmansd | The code swapped 3-bit and 5-bit FF CR RM classes | 20:46 |
| ghostmansd | Anyway, I'm going to wait for CI to finish | 20:46 |
| ghostmansd | Likely the journey isn't over yet | 20:47 |
| ghostmansd | programmerjake, does CI need a manual poke? | 20:49 |
| ghostmansd | Jobs list is empty: https://salsa.debian.org/Kazan-team/mirrors/openpower-isa/-/jobs | 20:49 |
| ghostmansd | Perhaps I should just wait for some time for CI to start | 20:50 |
| programmerjake | the mirroring process checks for new git commits every 5min iirc, this is because luke refused to modify git.libre-soc.org to update the mirror git repos when someone pushes to git.libre-soc.org, so i had to resort to polling from the build server... | 20:52 |
| ghostmansd | Ah, OK... | 20:57 |
| ghostmansd | I see that the last commit is not there yet; let's wait. | 20:57 |
| programmerjake | oh, i know why, the internet is currently down at my house, so of course it doesn't work... | 21:01 |
| programmerjake | my housemate apparently accidentally turned off the power for the router, it should work again shortly | 21:05 |
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| programmerjake | https://salsa.debian.org/Kazan-team/mirrors/openpower-isa/-/jobs/3818284 | 21:08 |
| ghostmansd | Ah, great! Thank you! | 21:12 |
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