Friday, 2023-02-24

programmerjakemarkos (and others): i posted a proposal for defining ABI size/align for SVP64 vector types: https://bugs.libre-soc.org/show_bug.cgi?id=1005#c501:00
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Ritishtoshywoshy: How do I download it x.x17:02
Ritishthe meeting ended too fast ig17:04
RitishDo you want these to be mailed, or should they rather be on that website itself, hmmm17:04
Ritishme shall sleep, will look at it tomorrow17:08
Ritishzzzz17:08
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octaviuslkcl, does the ls2 soc l0cache consist of 8 entries of 128-bit wide, as well as having one l0 for odd addresses, and one for even)?17:38
octaviusAlso, how big is l1 cache, and is it also split into instr/data caches?17:39
octaviusThis was not clear in the memory and cache page of the wiki17:39
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lkcloctavius: there is no l0 cache. that's for a future (massive) design.21:28
lkclthe l1 cache is defined by compile-time config options. you can look them up. i've forgotten where they are so it's just as much time for you to look them up as it is for me.21:29
lkcl(but i know they are there, which is the important thing)21:29
programmerjakelkcl: https://lists.gnu.org/archive/html/directory-discuss/2022-09/msg00000.html21:51
programmerjakeyeah, so they didn't actually finish changing their trademark policy afaict21:52
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