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lkcl | markos, jitsi meeting? | 08:59 |
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markos | lkcl, toshywoshy that was good, next steps? do we wait another mail/meeting from them or do we have to do something ourselves first? | 11:31 |
lkcl | yes it was. next phase is the "IMP" mentoring plan document | 11:35 |
lkcl | yes we just get on with it | 11:35 |
lkcl | i'll create 4 bugreports (main one, and 3 milestones) | 11:36 |
lkcl | and we can begin discussing what goes under them | 11:36 |
markos | ack | 11:37 |
toshywoshy | indeed, good meeting, lets work on the IMP and the work splits | 11:45 |
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octavius | lkcl, been looking at the ls180 pinout. Was there a particular reason why 3 External Interrupts (EINT) were added? Why for example, not 4? | 16:06 |
octavius | Forgot to add the wiki link: https://libre-soc.org/180nm_Oct2020/ls180/ | 16:14 |
lkcl | that's the quantity typically provided by SoCs. | 18:36 |
lkcl | they're used typically for emergencies such as "total power-off" | 18:36 |
lkcl | (by an external button) | 18:36 |
lkcl | but also for edge-triggered events | 18:37 |
octavius | Ah, so in your research of SoCs, 3 is the usual number of EINTs supplied? | 18:42 |
octavius | I seem to remember the ARM arch interrupt vector is much larger, but they probably have a more complex pinmux to add such functionality to every gpio | 18:44 |
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lkcl | for Cortex M0/3/4 embedded "arduino" style ECs, yes. | 21:32 |
lkcl | for a tablet/smartphone SoC, no | 21:32 |
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lkcl | for a BMC processor, yes | 21:32 |
lkcl | for a server CPU, no | 21:32 |
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