Monday, 2023-04-17

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lkclmarkos, jitsi meeting?08:59
markoslkcl, toshywoshy that was good, next steps? do we wait another mail/meeting from them or do we have to do something ourselves first?11:31
lkclyes it was. next phase is the "IMP" mentoring plan document11:35
lkclyes we just get on with it11:35
lkcli'll create 4 bugreports (main one, and 3 milestones)11:36
lkcland we can begin discussing what goes under them11:36
toshywoshyindeed, good meeting, lets work on the IMP and the work splits11:45
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octaviuslkcl, been looking at the ls180 pinout. Was there a particular reason why 3 External Interrupts (EINT) were added? Why for example, not 4?16:06
octaviusForgot to add the wiki link:
lkclthat's the quantity typically provided by SoCs.18:36
lkclthey're used typically for emergencies such as "total power-off"18:36
lkcl(by an external button)18:36
lkclbut also for edge-triggered events18:37
octaviusAh, so in your research of SoCs, 3 is the usual number of EINTs supplied?18:42
octaviusI seem to remember the ARM arch interrupt vector is much larger, but they probably have a more complex pinmux to add such functionality to every gpio18:44
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lkclfor Cortex M0/3/4 embedded "arduino" style ECs, yes.21:32
lkclfor a tablet/smartphone SoC, no21:32
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lkclfor a BMC processor, yes21:32
lkclfor a server CPU, no21:32
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