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* LOAD/STORE Inc(Snitch Style)
* TEST-ZERO(EXTRA-V Style)
* LOOPS(ZOLC Style)
* PE runs ZOLCand Snitch Style
* PE SEnds viaOpen CAPI to CPU,receives as well?
* OPENCAPI direct to CPU: Queues(Snitch Style)
* L1/L2 Not involved!
* Regfile Not involved!
* CPU could send direct to Memory?(depends on algorithm)
* CPU not idle:coordinatingParallel Processing,Managing RADIX MMUof PEs
MEM
L1/L2
REGFILE
Main CPU
MEM
PE Reg
PE
LOAD/INC
SEND
STORE/INC
TEST ZERO?
Open CAPI
Open CAPI
CPU
MUL
SEND
Main CPU
PE
LOAD/INC
TEST ZERO?
MUL
STORE/INC
MEM
PE Reg
CPU
(CoordinatingOpen CAPI)
LOOP
LOAD/INC
TEST ZERO?
MUL
STORE/INC
CPU
LOAD/INC
TEST ZERO?
MUL
STORE/INC
L1/L2
REGFILE