{
  "participants": [],
  "preamble": "",
  "type": "Group",
  "url": "https://bugs.libre-soc.org/show_bug.cgi?id=748",
  "plan": {
    "intro": [
      ""
    ],
    "tasks": [
      {
        "title": "799 coriolis2 hold violation",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=799\n "
        ],
        "amount": 2500,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=799 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 2500
          }
        ]
      },
      {
        "title": "800 Coriolis2 to add LVS capability",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=800\n "
        ],
        "amount": 6000,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=800 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 6000
          }
        ]
      },
      {
        "title": "819 Complete the conversion to Python 3,",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=819\n "
        ],
        "amount": 7000,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=819 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 7000
          }
        ]
      },
      {
        "title": "820 Upgrade HiTas/Yagle STA.",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=820\n "
        ],
        "amount": 2500,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=820 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 2500
          }
        ]
      },
      {
        "title": "822 Small academic survey of Logical Equivalence Checker (LEQ)",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=822\n "
        ],
        "amount": 3000,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=822 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 3000
          }
        ]
      },
      {
        "title": "823 Implementation of the Logical Equivalence Checker (LEQ)",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=823\n "
        ],
        "amount": 9000,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=823 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 9000
          }
        ]
      },
      {
        "title": "824 Adding wire RC to the layout extractor (Solstice)",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=824\n "
        ],
        "amount": 3000,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=824 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 3000
          }
        ]
      },
      {
        "title": "825 Add a new parser/driver able to handle Verilog names",
        "intro": [
          "https://bugs.libre-soc.org/show_bug.cgi?id=825\n "
        ],
        "amount": 6000,
        "url": "{{ https://bugs.libre-soc.org/show_bug.cgi?id=825 }} ",
        "milestones": [
          {
            "description": "wrapup",
            "amount": 6000
          }
        ]
      }
    ],
    "rfp_secret": ""
  }
}