Monday, 2021-09-27

openpowerbot[slack] <Anton Blanchard> @mithro not that specifically, but we have been playing with embench a bit02:30
openpowerbot[slack] <joel> Okay. I think it would make sense to send them out. What better place to coordinate our patches than the upstream tree02:49
openpowerbot[slack] <Anton Blanchard> Some good stuff to go after there. Paul added a fast 16bit multiplier, which might help a few of them03:00
openpowerbot[slack] <Anton Blanchard> @Paul Mackerras @Benjamin Herrenschmidt @Michael Neuling I wonder if we should make the wishbone arbiter round robin. I've been chasing a lockup doing writes via `mw_debug` and it's starting to look like a combination of `stop` not working, and the debug wishbone being permanently starved. (Not completely sure)03:04
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard we could, or as a test you could make debug take precedence over cpu :--)03:22
openpowerbot[slack] <Anton Blanchard> @Benjamin Herrenschmidt Great idea - was just in the process of testing that 🙂03:23
openpowerbot[slack] <Benjamin Herrenschmidt> the jtag isn't fast enough to starve the cpu 🙂03:25
openpowerbot[slack] <Anton Blanchard> I stumbled over this when trying to see if our clock domain crossings were ok in the bscan2/jtag/dmi stuff (no sign there is a problem there): https://github.com/eugene-tarassov/vivado-risc-v/tree/master/vhdl-wrapper/src/net/largest/riscv/vhdl03:25
openpowerbot[slack] <Benjamin Herrenschmidt> they are fishy but should be ok 🙂03:25
openpowerbot[slack] <Anton Blanchard> I wonder if vivado will infer a shift register from a couple of FFs or not03:25
openpowerbot[slack] <Benjamin Herrenschmidt> I had never-realized plans to rework the whole thing with a proper async fifo03:25
openpowerbot[slack] <Anton Blanchard> I wonder if vivado will infer a shift register from a couple of FFs or not.03:25
openpowerbot[slack] <Benjamin Herrenschmidt> so we can pipeline read/writes to memory03:25
openpowerbot[slack] <Benjamin Herrenschmidt> (also using less wires)03:25
openpowerbot[slack] <Anton Blanchard> Yeah async fifo might be nice03:25
openpowerbot[slack] <Benjamin Herrenschmidt> ah nice, makes bscan2 look morel like a proper jtag chain03:27
openpowerbot[slack] <Benjamin Herrenschmidt> hooked onto a "real" dmi bus (mine is somewhat adapted from the dmi, a free interpretation if you like 🙂03:28
openpowerbot[slack] <Benjamin Herrenschmidt> but if we want to pipeline for speed we'll need something a bit smarter than that03:29
openpowerbot[slack] <Benjamin Herrenschmidt> anyways, not something I have bandwidth for right noiw03:29
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard btw, sent you a PR a couple of days ago to add support for the Wukong board03:56
openpowerbot[slack] <Benjamin Herrenschmidt> also is simple_random dead ? 🙂 you never merged https://github.com/antonblanchard/simple_random/pull/803:57
openpowerbot[slack] <Benjamin Herrenschmidt> and I see no commits for more than a year03:57
openpowerbot[slack] <Anton Blanchard> @Benjamin Herrenschmidt I've got some updates I need to push. I think @Paul Mackerras has some changes too04:42
openpowerbot[slack] <joel> @Paul Mackerras the "icache: Fix icache invalidation" patch breaks u-boot booting on my arty05:08
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard For urjtag, I need the desc  for some other cable (real FTDI C232HM-DDHSL-0)05:29
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard are you reworking your patch ? I woudl suggest rather than changing every instance (which  also collides with my previous patch for the Olimex), you instead add a new macro that takes a desc05:29
openpowerbot[slack] <Benjamin Herrenschmidt> and change the old macro to pass NULL05:30
openpowerbot[slack] <Benjamin Herrenschmidt> that would make the patch a lot smaller05:30
openpowerbot[slack] <Benjamin Herrenschmidt> @joel odd, I have that patch and it works fine here05:30
openpowerbot[slack] <Benjamin Herrenschmidt> wait ... u-boot boots, I haven't tried booting a kernel 🙂05:30
openpowerbot[slack] <joel> Mine doesn't get into u-boot. The loader parsers the ELF, loads and jumps, but then no output05:33
openpowerbot[slack] <Benjamin Herrenschmidt> @Paul Mackerras is this right ?05:47
openpowerbot[slack] <Benjamin Herrenschmidt> ```-- Stall fetch1 if we have a miss on cache or TLB or a protection fault05:47
openpowerbot[slack] <Benjamin Herrenschmidt> stall_out <= not (is_hit and access_ok) and not use_previous;```05:47
openpowerbot[slack] <Benjamin Herrenschmidt> that mean we won't stall on use_previous = 1 even if access is not ok05:47
openpowerbot[slack] <Benjamin Herrenschmidt> I must admit I don't fully understand the benefit of that user_previous logic05:48
openpowerbot[slack] <Benjamin Herrenschmidt> I must admit I don't fully understand the benefit of that use_previous logic05:48
openpowerbot[slack] <Benjamin Herrenschmidt> I mean... we avoid reading from bram so we save some power I suppose but what else ?05:48
openpowerbot[slack] <Benjamin Herrenschmidt> because it makes things harder to understand05:50
openpowerbot[slack] <Benjamin Herrenschmidt> ah ... I see the original commit, right so it doesn't do much really **but** we could use it you reckon when sequential = 1 and it's the last insn of a line, to start the fetch of the next one a cycle early ?05:56
openpowerbot[slack] <Benjamin Herrenschmidt> i don't see how the whole use_previous logic wins us anything there though05:57
openpowerbot[slack] <joel> The use_previous logic is ok, if I add that on it's own06:19
openpowerbot[slack] <joel> It's something to do with the STOP_RELOAD state change and the wishbone addressing patch06:48
openpowerbot[slack] <joel> > +                    if get_row_of_line(r.store_row) = get_row_of_line(get_row(r.wb.adr)) then06:48
openpowerbot[slack] <joel> Do one of those functions need updating for word based wishbone addressing?06:49
openpowerbot[slack] <Anton Blanchard> I have some test cases that are failing around icbi07:10
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard point me to one ? I can try having a look08:59
openpowerbot[slack] <Benjamin Herrenschmidt> Ah ! @joel that could be it09:00
openpowerbot[slack] <Benjamin Herrenschmidt> get_row expects a full 64-bit address09:00
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard that patch that changes the wb addresses could have used some cleaner helpers to conver to/from09:05
openpowerbot[slack] <Benjamin Herrenschmidt> ```    function addr_to_wb(addr    : std_ulogic_vector) return wishbone_addr_type;09:09
openpowerbot[slack] <Benjamin Herrenschmidt>     function wb_to_addr(wb_addr : wishbone_addr_type) return std_ulogic_vector;```09:09
openpowerbot[slack] <Benjamin Herrenschmidt> I'll massage icache with this, see where it gets me09:10
openpowerbot[slack] <Benjamin Herrenschmidt> but if you have a test case that fails, shoot my way09:10
openpowerbot[slack] <Benjamin Herrenschmidt> hrm...09:23
openpowerbot[slack] <Benjamin Herrenschmidt> ```ghdl:error: unknown warning identifier: l,sim_vhpi_c.o```09:23
openpowerbot[slack] <Benjamin Herrenschmidt> ah mcode ... /me rebuilds with llvm09:30
openpowerbot[slack] <Benjamin Herrenschmidt> and .. the end result doesn't work09:31
openpowerbot[slack] <Benjamin Herrenschmidt> ```/usr/bin/ld: /usr/local/lib/ghdl/libgrt.a(grt-rtis.o): in function `__ghdl_rti_add_package':09:31
openpowerbot[slack] <Benjamin Herrenschmidt> /home/ANT.AMAZON.COM/benh/grabbag/ghdl/src/grt/grt-rtis.adb:30: undefined reference to `__gnat_last_chance_handler'```09:31
openpowerbot[slack] <Benjamin Herrenschmidt> ah, needs newer llvm09:38
openpowerbot[slack] <Benjamin Herrenschmidt> <@UNG0KEJ5B> try: : https://files.slack.com/files-pri/T443QD9JA-F02FQR9LV99/download/ic.diff09:57
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard if you agree with the principle, I can convert the rest to use the helpers, makes things a bit more readable09:57
openpowerbot[slack] <Benjamin Herrenschmidt> I **almost** used unspecified size vectors for the helpers but it can get a bit tricky and I think it generates slower sim...09:58
openpowerbot[slack] <Benjamin Herrenschmidt> if I could be bothered I could try to revive the work I did to make wishbone types use generics rather than having the two copies10:13
openpowerbot[slack] <Anton Blanchard> @Benjamin Herrenschmidt the helpers look nice to me10:23
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard what do we do for testing these days ? sstill make check before bed and check the results in the morning ? 🙂12:39
openpowerbot[slack] <Anton Blanchard> Or let the CI do it for you 🙂12:40
openpowerbot[slack] <Benjamin Herrenschmidt> how do I setup the CI on my perso fork on github ?12:46
openpowerbot[slack] <Anton Blanchard> I think it might just work? I see a green tick on your `wukong` branch on your github repo12:53
openpowerbot[slack] <Benjamin Herrenschmidt> that's when I sent a PR13:02
openpowerbot[slack] <Benjamin Herrenschmidt> what if I want to just test my stuff ?13:02
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard @joel @Paul Mackerras feel free to checkout / test my misc branch. Mostly "cleanups" to make address format conversions a bit more readable, but should also fix the problem @joel spotted with the new STOP_RELOAD state13:05
openpowerbot[slack] <Benjamin Herrenschmidt> @Paul Mackerras can you check the stall logic in icache ? I'm not 100% sure about what you have there (see my msg earlier)13:06
openpowerbot[slack] <Benjamin Herrenschmidt> @Anton Blanchard I've done a PR 🙂 it's barely tested but that will kick the CI13:07
openpowerbot[slack] <joel> It solves the issue I was seeing on my arty. Thanks Ben!13:54
openpowerbot[slack] <Anton Blanchard> Fixes my issues too, nice work!21:39
openpowerbot[slack] <mithro> @Paul Mackerras You should take a look at https://github.com/tdene/synth_opt_adders22:14
openpowerbot[slack] <mithro> @Paul Mackerras You should take a look at https://github.com/tdene/synth_opt_adders22:14
openpowerbot[slack] <Paul Mackerras> @mithro thanks23:02

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