| openpowerbot_ | [mattermost] <lkcl> Paul: throughout mmu.py i've been identifying bits and converting them to records/structs. in radix_tree_wait i have this: | 12:31 |
|---|---|---|
| openpowerbot_ | [mattermost] <lkcl> 285 # rts == radix tree size, # address bits being translated | 12:31 |
| openpowerbot_ | [mattermost] <lkcl> 286 comb += rts.eq(Cat(prtbl.rts2, prtbl.rts1, prtbl.rsv1)) | 12:31 |
| openpowerbot_ | [mattermost] <lkcl> which comes from: | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 90 # v3.0C Book III Section 6.7.6.2 p1004 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 94 self.rpds = Signal(5) # Root Page Directory Size 59:63 LSB0 0:4 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 95 self.rts2 = Signal(3) # Radix Tree Size part 2 56:58 LSB0 5:7 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 96 self.rpdb = Signal(52) # Root Page Directory Base 4:55 LSB0 8:59 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 97 self.rsv2 = Signal(1) # reserved 3 LSB0 60 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 98 self.rts1 = Signal(2) # Radix Tree Size part 1 1:2 LSB0 61:62 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> 99 self.rsv1 = Signal(1) # reserved 0 LSB0 63 | 12:32 |
| openpowerbot_ | [mattermost] <lkcl> that same bit rsv1 (MSB0 bit 0, LSB0 bit 63) is "hr" in the Page-Table Record | 12:34 |
| openpowerbot_ | [mattermost] <lkcl> 154 self.hr = Signal(1) # Host Radix 0 LSB0 63 | 12:34 |
| openpowerbot_ | [mattermost] <lkcl> was that deliberate / intentional to include that extra bit in calculating the radix tree size? (same thing is done in radix_tree_idle | 12:34 |
| openpowerbot_ | [mattermost] <lkcl> was that deliberate / intentional to include that extra bit in calculating the radix tree size? (same thing is done in radix_tree_idle) | 12:35 |
| openpowerbot_ | [mattermost] <lkcl> rts gets used to create a mask (the shift amount), i was wondering if it's being used for something that's not part of the spec | 12:40 |
| openpowerbot_ | [mattermost] <lkcl> although later checks for the shift amount <5 >16 cause an invalid mask to be detected, it's much later in the process, and thus less obvious what's going on | 12:41 |
| * openpowerbot_ [mattermost] <lkcl> ponders | 12:41 | |
| openpowerbot_ | [mattermost] <lkcl> oh wait - NLS gets a check "<5 >16", the shift amount does not | 12:43 |
| openpowerbot_ | [slack] <Benjamin Herrenschmidt> Your stall is going down. Every cycle where stall is low while stb high is consider as an accepted transaction | 21:58 |
| openpowerbot_ | [slack] <Benjamin Herrenschmidt> Acks are async in pipelined wb | 21:59 |
| openpowerbot_ | [mattermost] <paulus> lkcl, why are you including the most-significant bit of the process and partition table entries in the radix tree size computation? mmu.vhdl doesn't do that | 22:07 |
| openpowerbot_ | [mattermost] <paulus> ```rts := unsigned('0' & pgtbl(62 downto 61) & pgtbl(7 downto 5));``` | 22:08 |
| openpowerbot_ | [mattermost] <paulus> literal zero bit not bit 0 | 22:08 |
| openpowerbot_ | [mattermost] <lkcl> eehm. ah ha! a bug! thx paul | 23:53 |
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