| openpowerbot_ | [slack] <Matt Johnston> @Benjamin Herrenschmidt the top level needs changes to reset liteeth and litesdcard on soc reset (I assume that's the desired behaviour). it doesn't need to loop back, but didn't seem any harm in using the same soc_rst signal for the soc and peripherals. otherwise I think it'd need a `soc_rst <= gen_rst or not eth_clk_locked or not system_clk_locked` as well as a `periph_soc_rst <= soc_rst or sw_rst` | 01:08 |
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| openpowerbot_ | [slack] <Benjamin Herrenschmidt> But didn't you create a combinational loop ? | 01:12 |
| openpowerbot_ | [slack] <Matt Johnston> it should be clocked? | 01:13 |
| openpowerbot_ | [slack] <Benjamin Herrenschmidt> I think you should just feed literyh etc... With soc_rst | sw_rst | 01:13 |
| openpowerbot_ | [slack] <Matt Johnston> ok | 01:13 |
| openpowerbot_ | [slack] <Benjamin Herrenschmidt> Or maybe call it io_rst | 01:13 |
| openpowerbot_ | [slack] <Benjamin Herrenschmidt> I don't like the 'loop' as a concept | 01:14 |
| openpowerbot_ | [slack] <Matt Johnston> will test that works and update the PR | 01:19 |
| openpowerbot_ | [slack] <Benjamin Herrenschmidt> thanks ! | 18:59 |
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