Tuesday, 2020-10-27

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protractorproIt looks like some of your former contributors started their own open PowerPC project https://chipeleven.com/05:11
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cesar[m]1Their code base is not free, since the license forbids commercial use.10:22
cesar[m]1This means we cannot use any of their code, and vice-versa.10:34
cesar[m]1I'd go as far as advising to not even look at their source files, to avoid the danger that we end up unintentionally deriving from some part of their code.10:43
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mePy2[m]Guys, how can I best make the latch in the comp_unit_req_rel image? Which kind of FF it is? (D latch, SR latch, T, JK, ...)13:45
mePy2[m]lkcl13:45
lkclit's an SR NOR latch in that diagram17:04
lkcljust put 2 NOR gates with a cross-over, that's pretty standard17:04
mePy2[m]Nice, yeah17:05
lkclcesar[m]1: it's slightly more than that.  michael etc. do not full comprehend copyright law and took jointly-owned copyrighted material and are slapping an alternative license on it without permission17:05
mePy2[m](I deleted the messages actually, because you already replied to me. But I think you still can see them)17:05
lkclmePy2[m]: you can't delete messages from IRC :)17:06
lkcland you can't delete them from the IRC history either (https://libre-soc.org/irclog/)17:07
mePy2[m]Anyway, about the SR latch: how it is linked to the rest? (op is linked to S and the other to the R? Does it work?)17:07
mePy2[m]lkcl: Yeah17:08
lkcl1 sec the SSL certificate hasn't been renewed, i need to call Alain straight away17:08
lkclok sorted.  right, where were we17:09
lkclargh it might be due to timezones, argh17:10
lkclwhat was the bugreport number you put the SVG under?17:10
lkcl44217:10
mePy2[m]Which FF/Latch to use17:11
lkclyou said "about which SR latch", i need to see the diagram you've put it in17:11
mePy2[m]44217:11
lkclok inkscape is much better17:13
lkclok right SR latches are symmetric17:13
lkclS and R are only "conventions" that you attach to one or other of the inputs17:14
lkclthe important thing is that you use the correct output and that's what you've done17:14
mePy2[m]Yeah, I am still doing it. (Also that image has an imperfection I shall fix)17:15
lkclthe AND gates btw need to start off as straight sides then have a circular curve at the end17:15
mePy2[m]I cannot do it at the moment unfortunately.17:16
lkclthis is why i suggested using the wikimedia CC images17:16
lkclbecause the "look" (conventions) are quite specific and well-defined for over 40 years now17:16
lkclthe OR and NOR look great though, very close to the standard convention17:17
lkclthe AND gates not so much17:17
lkclthis is what an AND gate should look like17:17
lkclhttps://en.wikipedia.org/wiki/Logic_gate#/media/File:AND_ANSI_Labelled.svg17:17
lkcland you can use that directly as-is because it's wikimedia CC licensed17:18
lkclhere is an SR NOR latch diagram you have it pretty close https://sub.allaboutcircuits.com/images/04173.png17:19
lkcllet me try and work out which one is...17:19
lkclok "Set" (S) is "Open"17:19
lkcl"Reset" (R) is "close"17:20
lkclthere's a cross-over you can see in that PNG17:20
lkclS "crosses over" to make Q on the *other* gate go HI17:20
lkclR "crosses over" to make Q-dashed on the *other* gate go HI17:20
lkclthis is at first very confusing :)17:20
lkcla quick look shows that michael *might* have started from scratch, including on the power decoder17:27
mePy2[m]lkcl: I copied “as is” from the raster image.19:42
mePy2[m]I do not like the AND gates too19:42
mePy2[m](Neither the NOR at first lol. Anyway, np I can mod it to make it more “professional”)19:43
mePy2[m]Anyway I was referring to the latches at the left. The ones with the operands (and opcode). Which kind of latches they are? lkcl19:45
mePy2[m]How does the circuit work? lkcl Can you explain me? (If you are available now can we do a quick jitsi meet?)21:30
mePy2[m]I mean, what is the purpose of Go_Read, Go_Write, Issue...21:30
mePy2[m]lkcl: We are waiting for you :)22:08
cesar[m]1... in the OpenPower coffe meeting.22:09

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