Sunday, 2021-03-07

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lkclcesar[m]1, did you manage to recover the tablet yet? :)10:36
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cesar[m]1Not yet, but I'm making progress. I'm learning and practicing some recovery steps with an old unused Android phone, first, until I have enough confidence.11:01
lkclcesar[m]1, good idea11:12
lkcladd. Rc=1 works!11:12
lkclthe for-loop is such a ridiculously small amount of code :)11:23
lkclsurely it has to be more difficult, right? :)11:23
lkclactually y'know what, it just occurred to me, if VL=0 the instruction doesn't even have to be issued11:25
cesar[m]1lkcl: I intend to draw a state diagram to help understanding the current FSM design for Simple-V.13:13
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lkclyes please :)14:04
lkclbtw we do need to morph the PC (NIA) setting back into fetch at some point (now that the loop's working) because PC is a forward-progression that in pipeline and multi-issue can't have a dependence on issue/execuet14:06
lkclamusingly we might be able to do a multi-issue FSM :)14:07
lkcllxo: david calmed down.  it was very interesting.  he's witnessed... a *lot* of spongeing over the years, of his and other experts' time, over the years.  he thought we (RED Semiconductor) were going to do the same thing14:10
lkcli explained that i *am* a libre software developer and i'm not going to let that happen14:10
lkcl:)14:10
mopar_edlkcl: hi, I went through the HDL_workflow installation process. as a feedback here a some of the extra things I'd to do: for section 6.5 I had to do "pip3 install wheel", and I had to install rust for 6.5 as well14:13
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lkclahh brilliant14:45
lkclmopar_ed: thanks14:46
lkclhave you managed to work out how to edit the wiki yet? :)14:46
lkcli apologise i was getting a lot of spam email-logins you may just have to do password-based14:47
cesar[m]1lkcl: Understood, will work on moving the VL==0 loop and the NIA write into the Issue FSM.14:50
lkclmopar_ed, what on earth does rust have to do with softfloat? moo? :)14:52
lkclthe ieee754 library which needs pia does need it14:54
lkclmopar_ed, ah:  pip3 install --upgrade -r requirements.txt14:54
lkclcat requirements.txt14:54
lkclpip14:54
lkclwheel14:54
lkcltwine14:54
lkclkeyring14:54
lkclcython==0.28.514:54
cesar[m]1lkcl: We wait on "core busy" before simulating an instruction. Trouble is, on a VL==0 loop, there is no issue, so busy is never toggled. Will create another signal for the Simulator to wait on.15:00
cesar[m]1See https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simple/test/test_runner.py;h=9b8426b65cc4afba530de0fcd7efdc1839976bf0;hb=HEAD#l25615:00
lkclah ok yes duh of course15:02
lkcli will add svstate to DMI15:02
lkcland JTAG15:02
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lkcloh.  err... that was easy :)15:05
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lkclthat will at least allow in litex sim.py to do a side-by-side comparison of debug output, later15:07
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mopar_edlkcl: strange, I did the pip3 install using the requirements.txt, probably I wasn't inside the venv. not sure now if rust was required for 6.5 or somewhere else, I thought I had written it down, but cannot find my notes now.19:13
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mopar_edquestion: I'm at the "make update" from here: https://git.libre-soc.org/?p=soc.git;a=summary21:03
mopar_edlog is not very helpful:21:04
mopar_edRunning Sphinx v3.5.221:04
mopar_edSphinx error:21:04
mopar_edBuilder name update not registered or available through entry point21:04
mopar_edmake: *** [Makefile:63: update] Error 221:04
mopar_edhas anyone had this before?21:04
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lkclmopar_ed, it will have been for pia21:32
lkclsphinx? moo? :)21:32
lkcl1 sec21:32
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lkcl"make update" ah hang on... yep21:33
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lkcl"make gitupdate"21:34
lkclmopar_ed, ^21:34
mopar_edlkcl: thanks!21:49
awyglehi everyone. is it expected that the ieee754fpu test suite will pass on current master? i'm seeing some failures which are straight-up python errors and i want to make sure i don't have the wrong repo or branch (although i didn't see any likely branches)22:01
awygle(these are separate from the "nmigen's simulator interface has changed" errors which are more expected)22:03
programmerjake[myes, it's (sadly) expected that master doesn't pass all tests22:04
awyglehm, ok. so my target then is "don't break any additional tests"?22:05
programmerjake[mwe *still* haven't gotten around to finishing setting up CI22:05
programmerjake[myeah, more or less22:05
awyglegotcha, thanks22:05
awygleTo Whom It May Concern - AddReduce is broken in part_mul_add/multiply.py, line 334, looks like some code got halfway migrated22:06
programmerjake[mplz create a bug report22:07
awygleyup22:08
programmerjake[mthx22:08
awygleas soon as bugzilla sends me a password reset link.....22:17
programmerjake[mif you can't get it to work, check with lkcl22:21
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lkclawygle, yes none of the IEEE754 code is in use (including the partitioned multiply)23:40
lkclwe had to leave it for about a year and focus on getting the OpenPOWER 3.0B core running23:40
awyglemakes sense23:41
lkclawygle: your mail server is treating libre-soc.org as a spam / virus server23:41
awyglehm that's odd. it's just a forward to gmail, and i did get the earlier bugzilla messages.23:42
lkcli've sent you a pm with the link, and forwarded you the message as well23:42
awyglethanks23:43
awygleok i'm in now, great23:43
awyglejust to confirm, the PartitionedSignal in ieee754fpu _is_ the PartitionedSignal in question, right? that's the only one i'm seeing in the repos i have checked out.23:45
lkclyes23:45
awygleok, good23:45
awyglethat would have been embarrassing23:45
lkcl:)23:45
lkclcesar[m]1 worked on the formal correctness proof only a few weeks back23:45
lkclawygle, even the forwarding from lkcl@lkcl.net just failed!23:57
lkcl    host mx.hover.com.cust.hostedemail.com [216.40.42.4]:23:57
lkcl    550 5.7.1 Message contains spam or virus. (109)23:57
awyglehm ok let me try and convince hover to chill out23:57

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