| programmerjake | thought I'd post this here in case anyone's interested: https://github.com/programmerjake/simple-riscv-cpu | 11:27 |
|---|---|---|
| programmerjake | I just wrote that in 4hr since I'm planning on showing my friend how to make a simple cpu later today ... untested, but it's a complete RV32I CPU (except for it's missing fence, ecall, ebreak, and csr operations, and it doesn't do full illegal operation checking) | 11:29 |
| lkcl | cool! | 12:05 |
| lkcl | and hilarious | 12:05 |
| lkcl | heads-up i just made a rather invasive change to the size of the SPR regfile, to get gate count down for the ls180nm tape-out | 16:50 |
| mepy | lkcl have you seen the git page? | 22:12 |
| mepy | Anyway, can I add a toc to the beginning of the HDL workflow page? | 22:13 |
| mepy | (I am going to ask) | 22:13 |
| mepy | (Should I ask this in the mailing list instead?)* | 22:13 |
| mepy | (mail sent, but not a big change anyway.) | 22:23 |
| *** mepy <mepy!~mepy@151.73.25.29> has left #libre-soc | 22:23 | |
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