Monday, 2021-03-29

lkclChips4Makers: *great* to have a post-layout simulation13:10
Chips4Makers@lkcl: final target is that one should be able to do it with FreePDK45 version for people who don't have access to the .18 TSMC NDA PDK.14:00
lkclfrickin fantastic.  love it.15:58
lkclChips4Makers: just sorting out the tags15:59
* lkcl found this
lkclChips4Makers: new tag name is 24jan2021_ls180 which i just checked does not cause scmsetuptools to barf16:02
Chips4Makers@lkcl: The litex stuff all comes from the enjoy-digital repos on github ?16:20
Chips4Makers@lkcl: still problems with installing libresoc's c4m-jtag:16:33
Chips4Makers    raise InvalidVersion("Invalid version: '{0}'".format(version))16:33
Chips4Makerspkg_resources.extern.packaging.version.InvalidVersion: Invalid version: '24jan2021_ls180'16:33
Chips4MakersThis is python version 3.9.2 (from conda), setuptools 52.0.016:33
lkclChips4Makers, yes16:50
lkclah fer f'''s sake16:50
lkclok gimme 1 sec to delete that.16:50
lkclChips4Makers: ah we've never tested with python 3.9.  3.7 and 3.8 only16:52
lkclii  python3-setuptools                               52.0.0-316:52
lkclshould be good.16:53
lkclre-running "python3 develop" in c4m-jtag now16:53
lkclInstalled /home/lkcl/src/libresoc/c4m-jtag16:53
lkclProcessing dependencies for c4m-jtag===24jan2021ls181.dev2-gf9e596216:53
lkcllet me just blow it away see what happens...16:54
lkclyep works fine16:55
Chips4MakersSeems PEP440 is enfoced on my side:
klysis there further progress on the chip layout that will implement kazan?16:56
lkclkazan is a vulkan software driver to be using hardware-acceleration opcodes16:57
Chips4MakersAnyway I removed tags locally and added v0.0.0 tags to get it installed.16:58
lkclok good call16:58
klysI heard it was frozen because there was a chip vendor working on it16:58
lkclthere is no progress on a chip layout doing kazan because we have not started that16:58
klysokay thank you16:59
lkcloh you mean the founder of chipeleven betraying the trust we placed in them?16:59
klysI would know nothing about such things16:59
lkclput us behind by at least a year.16:59
lkclthe plan is to do this 180nm test ASIC first17:00
lkclthen either a 180 or 130nm one to be taped-out next year that is fully pipelined17:00
lkclwhen that's working *then* we will have the confidence to drop USD 6 to 8 million on a quad-core 1.5 to 2ghz 22nm SoC17:01
lkcland that's the point at which kazan (and the MESA 3D driver) and all other software will run.17:01
klysthank you much.17:02
lkclno problem.17:04
lxowould anyone object if I were to offer GCC mentoring/tutoring by enlisting volunteers to implement parts of the libre-soc ISA extensions?17:11
lkcllxo: great!17:12
lkclnot at all, particularly given that they'd be able to receive some of the NLnet donation for doing so17:12
lxoI was thinking of offering such mentoring/tutoring as part of the efforts to reduce gender imbalance in the GCC community, and thought libre-soc might be a wonderful opportunity to make a win-win out of it17:13
lkclyes, great idea17:13
lxoare there any constraints WRT gender-related positive discrimination?17:13
lkclBob Podolski's research clearly showed that teams work better when there's a 50-50 balance17:14
lkclabsolutely none whatsoever.17:14
lxobeautiful, thanks17:14
danielp3344'positive discrimination'?17:23
lxoI'm not sure that's the right term in English.  I'd appreciate advice on what the correct term for that is.  in pt_BR the term translates literally as 'affirmative action'17:24
lxoas in, action intended to reverse prejudicial discrimination and correct imbalances arising from it17:25
lxooh, hey, danielp3344, glad to see you here! :-)17:26
danielp3344IE attempting to artificially raise the number of individuals from an under represented group?17:26
danielp3344lxo: you too :P17:27
lxocountering the artificial underrepresentation, yeah17:27
lkcllxo: if you got people responding (any people), i'd prefer that you considered them on technical merit17:27
lkclthat said i have no problem with the "marketing message" going out that invites under-represented people17:28
danielp3344I'm not sure I fit the criteria but I gave notice at my current job last week, so by the end of next week I'll have a few months of time to devote to a new project17:28
lkcldanielp3344: some cross-over, there, with what i just wrote :)17:28
lxoI'd like to make this personal effort to reduce gender imbalance, that is recognized as a problem in the GCC community17:28
danielp3344I have to say I agree with lkcl, encouraging minorities is fine as long as you don't turn away legitimate talent17:28
lkcldanielp3344: everyone is welcome.17:28
lkclgot it in one, danielp334417:29
lkcli added the dilbert cartoons last week :)17:29
lxothat doesn't mean I could not offer similar tutoring to danielp3344 or others, but I'd really like to focus on that goal17:29
danielp3344If I might get philosophical for a second, does gender imbalance matter?17:30
danielp3344As long as certain groups aren't actively being treated badly that is17:30
lkcly'know... in china i was stunned to find that there isn't a problem with gender imbalance in science and maths, at all.17:30
klysdid GCC mean "gnu compiler collection" or what?17:30
lkclklys: yes.17:31
lkclit includes ada, fortran, many others.  kinda cool17:31
lxoit matters so much in the GCC community that they're presenting it as an excuse to expel RMS from the steering committee17:31
danielp3344lxo: but why does it matter?17:31
lxoI want to call the BS on that17:32
lkcldanielp3344: what's your background btw?17:32
danielp3344lkcl: ermmm, complicated17:32
danielp3344dropped out of college with a fraction of a math degree, currently working in manufacturing17:33
lxoreal action as opposed to fake gestures with very obvious undisclosed intents17:33
danielp3344my computing career has been entirely self taught17:33
lkclwhen i went to IIT Madras University i learned that there's a Govt funding Programme to provide full indefinite maternity leave for women, and grants as well17:33
* danielp3344 considers himself a very under represented group :P17:33
lkclresult: *thirty percent* women in the Masters and PhD Programme in the RISE Group, doing RISC-V hardware17:34
lkcldanielp3344: nice.17:34
lxothen you'll probably qualify :-D17:34
danielp3344I would say I have good experience with C and working knowledge of compilers and CPUs17:35
danielp3344but would like to learn more and contribute to a cool project17:35
lkclwell, this is about as cool as it gets to be honest17:35
danielp3344I've noticed lol17:35
lxoI suppose I could ask applicants to state not only what their background is and why they're interested, but also what underpresent strengths they'd bring to the community17:36
danielp3344Unfortunately I'm currently on break at work but I will return this evening17:36
lkclhave you seen the "SIMD considered harmful" article?
lkcldanielp3344: if you're around 22:00 UTC we've a jitsi meeting tomorrow17:37
lkclklys, ^17:37
lxoI've just had this idea less than an hour ago, I'm still working out the details, so thoughts are welcome17:37
danielp3344lxo: IMHO people like me with very non formal education are hugely under represented17:37
danielp3344lkcl: sweet, I'll see if I can be there17:37
klysI'll think it over17:37
danielp3344cya all later17:37
lkcldanielp3344: self-taught is to be honest exactly what we need.  it means "no preconceptions"17:37
lkclemail me luke.leighton@gmail.com17:37
lkclklys: sure.  it's... open discussion. anything you feel like sharing.17:38
lxoI'm also thinking of calling for other GCC developers to participate as mentors/tutors17:38
lxoso that we can accept more applicants17:38
lkclyeah that'd be a great idea17:38
lxothough others may want to direct their attention to projects other than libre-soc17:38
lkcllibre-soc happens to be one with tax-deductible donations available though :)17:39
lkcllxo, if you happen to know danielp3344's email address do forward the jitsi link on17:39
lxoI'm also unsure whether to make it a technical, GCC-only thing.  I'm considering the possibility of also covering libre philosophy/software ethics/copyleft, and perhaps also neurodiversity17:39
lxoI don't think I do, but danielp3344 is still here, so he'll eventually read this17:41
klysso, in approx. just over five hours from now.  how do you link the meeting?17:43
lkclklys, i can pm you the link - it will be... 24+5 hours (tomorrow UTC 22:00)17:46
jn__are the libresoc meetings open for outsiders, btw? i think i'd like to listen in17:46
lkcljn__, yes, of course - it's informal17:46
lkclit's libresoc / openpower / microwatt / anything-you-like17:47
lkclthey started from the OpenPOWER Virtual Coffee calls that hugh started last year17:47
jn__great, i'll try to remember the time17:47
lkclif you email me i can add a calendar invite / reminder17:48
lkclit's not password protected so please don't publish it widely!17:48
jn__got it17:50
jn__mail sent :)17:50
lkcladded you - the 2 reminders are set to go out 1 day before and then a 2nd one 10 mins before17:52
programmerjake:) i kinda have a mostly non-formal education -- >90% of the programming/engineering skills I learned happened outside of formal education ... I started a university degree in electrical engineering/computer engineering but dropped out part way through. I had already written a BASIC-dialect compiler, a 70kloc video game, and designed a really simple cpu before starting college18:01
lkcland wrote a RISC-V CPU in what, a few hours, yesterday? :)18:04
jn__similar here— i learned to program out of school, then entered university and practically dropped out18:08
jn__(i'm still enrolled for the formal advantages, because it's cheap here)18:08
programmerjakeyup, I got it to run a hello world program after posting the link...idk if any of the unused instructions are correct though18:09
lxodanielp3344, rereading our conversation, I've also realized that "qualify" is not quite what I meant.  I don't intend to exclude anyone, but all else being equal, I wish to devote more attention to underprivileged groups so as to try to reduce demographic imbalances18:23
lkclwhat lxo is saying is: if you'd like to help with libresoc you're more than welcome :)18:28
lkclChips4Makers: install going ok?18:29
lxolkcl, oh, that's an unrelated given18:29
lxoI was talking specifically about participation in this tutoring program I'm thinking of18:30
lkclahh ok18:30
lkclgot it18:30
lkclChips4Makers: if you have everything installed in litex, "make run_sim" in the top level soc directory18:31
lkcleee gods the verilator BIOS load is slow :)18:32
lkclbut it gets there18:32
Chips4Makers['__class__', '__delattr__', '__dict__', '__dir__', '__doc__', '__eq__', '__format__', '__ge__', '__getattribute__', '__gt__', '__hash__', '__init__', '__init_subclass__', '__le__', '__lt__', '__module__', '__ne__', '__new__', '__reduce__', '__reduce_ex__', '__repr__', '__setattr__', '__sizeof__', '__str__', '__subclasshook__', '__weakref__', 'add_op', 'forms', 'instr', 'page', 'pages_written', 'patch_if_needed', 'pprint_o18:36
Chips4Makersile', 'read_file_for_rewrite', 'write_isa_class', 'write_pysource']18:36
Chips4MakersTraceback (most recent call last):18:36
Chips4Makers  File "/home/verhaegs/eda/Chips4Makers/libre-soc/soc/src/soc/decoder/pseudo/", line 140, in <module>18:36
Chips4Makers    if sources[0] == "noall": # don't rewrite all.py18:36
Chips4MakersTypeError: 'dict_keys' object is not subscriptable18:36
Chips4MakersFail of make run_sim ^18:36
lkclChips4Makers: probably why you should use python 3.7 or 3.818:41
lkclah 1 sec i think i know what that might be18:42
lkclit'll be because you're using python 3.918:43
lkcloh wait... no, i got it18:43
Chips4Makerssolved it:18:44
Chips4Makersdiff --git a/src/soc/decoder/pseudo/ b/src/soc/decoder/pseudo/pywriter.py18:44
Chips4Makersindex bc0f5885..83b9d737 10064418:44
Chips4Makers--- a/src/soc/decoder/pseudo/pywriter.py18:44
Chips4Makers+++ b/src/soc/decoder/pseudo/pywriter.py18:44
Chips4Makers@@ -133,7 +133,7 @@ if __name__ == '__main__':18:44
Chips4Makers     isa = PyISAWriter()18:44
Chips4Makers     if len(sys.argv) == 1:  # quick way to do it18:44
Chips4Makers         print(dir(isa))18:44
Chips4Makers-        sources =
Chips4Makers+        sources = tuple(
Chips4Makers     else:18:44
lkclyeah that'd do the trick18:44
lkclthe litex thing you'll need to use the older bios isr.c18:45
lkclalthough it'd be better to use litex commit 35929c0f8a8f1cc098a6b6ebb569caca8df8c08d for now18:45
Chips4MakersI switched to enjoy-digital litex because I got problem with litedram.18:45
lkcl+++ b/litex/build/io.py18:46
lkcl@@ -64,7 +64,7 @@ class SDRIO(Special):18:46
lkcl     @staticmethod18:46
lkcl     def lower(dr):18:46
lkcl-        return InferedSDRIO(dr.i, dr.o, dr.clk, dr.clk_domain)18:46
lkcl+        return InferedSDRIO(dr.i, dr.o, dr.clk) # dr.clk_domain)18:46
lkclan error at line 70 of litex/build/ by chance?18:46
lkcli would have to investigate the XICS stuff, gimme a sec to look up the pythondata-microwatt18:48
Chips4MakersTraceback (most recent call last):18:49
Chips4Makers  File "/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/./", line 476, in <module>18:49
Chips4Makers    main()18:49
Chips4Makers  File "/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/./", line 465, in main18:49
Chips4Makers    soc = LibreSoCSim(cpu=args.cpu, debug=args.debug, variant=args.variant)18:49
Chips4Makers  File "/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/./", line 140, in __init__18:49
Chips4Makers    phy_settings     = get_sdram_phy_settings(18:49
Chips4Makers  File "/home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/tools/", line 152, in get_sdram_phy_settings18:49
Chips4Makers    return PhySettings(18:49
Chips4MakersTypeError: __init__() got an unexpected keyword argument 'rdcmdphase'18:49
lkclngggggh of course there's frickin submodules that are not done as submodules18:50
lkclin litex they use a "script"18:50
lkcllitedram i am at commit 198bcbab676e2b4065e5b6a7dc8a7733bae8315a18:51
lkclahhh there are the #defines18:52
lkcl1 sec18:52
* lkcl looking up the irq stuff18:55
lkclthey've switched over to XICS interrupts in the UART stuff19:07
lkclwhich may tie problems with the UART to problems with XICS19:08
lkcli just enabled the IRQ stuff and it doesn't give anything on console19:08
lkclthis is a damn bloody nuisance.19:10
lkcli'll go through tagging all of the litex sub-repositories19:10
lkclthen sort out a "repro" script for it19:11
Chips4MakersSwitched to litedram commit you indicated and I now seem to get further...19:13
lkclokaaay great19:14
lkclyou can do a "git pull" and "make gitupdate" in soc19:14
lkclgreat, because i was about to start tearing my hair out :)19:15
lkclin pythondata-cpu-microwatt (which _should_ not be needed,19:15
lkclcommit ba76652320e9dc23d9b2c64a62d0a752c870a215 (HEAD, tag: 2020.08, origin/oldmaster)19:16
lkcli need to document these19:16
Chips4MakersAlso had to install pythondata-misc-tapcfg and libjson-c-dev19:18
lkclack. the -dev depend i'll add to the auto-scripts19:19
Chips4Makersand verilator...19:22
lkclah :)19:23
lkclah that needs to be from source19:23
lkclerr there is a debian package19:24
lkclmight work19:24
Chips4Makerssymbiflow packages it also with conda, I'm trying that now.19:24
lkclPackage: verilator19:25
lkclVersion: 4.038-119:25
lkcli had built 4.039 from source19:25
lkcli see no reason why debian/10 verilator shouldn't work? let me check the version19:26
lkclok it's bullseye (testing) that has 4.03919:26
Chips4MakersI have mint and that has version 4.02819:27
* lkcl need to get up and walk about19:29
Chips4Makersmkdir -p /home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/obj_dir19:33
Chips4Makers/home/verhaegs/anaconda2/envs/libresoc/bin/x86_64-conda_cos6-linux-gnu-cc -c -march=nocona -mtune=haswell -ftree-vectorize -fPIC -fstack-protector-strong -fno-plt -O2 -ffunction-sections -pipe -isystem /home/verhaegs/anaconda2/envs/libresoc/include -Wall -O0 -ggdb   -o /home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/obj_dir/modules.o /home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/si19:33
Chips4Makers/home/verhaegs/anaconda2/envs/libresoc/bin/x86_64-conda_cos6-linux-gnu-cc -c -march=nocona -mtune=haswell -ftree-vectorize -fPIC -fstack-protector-strong -fno-plt -O2 -ffunction-sections -pipe -isystem /home/verhaegs/anaconda2/envs/libresoc/include -Wall -O0 -ggdb   -o /home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/obj_dir/pads.o /home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/c19:33
Chips4Makers/home/verhaegs/anaconda2/envs/libresoc/bin/x86_64-conda_cos6-linux-gnu-cc -c -march=nocona -mtune=haswell -ftree-vectorize -fPIC -fstack-protector-strong -fno-plt -O2 -ffunction-sections -pipe -isystem /home/verhaegs/anaconda2/envs/libresoc/include -Wall -O0 -ggdb   -o /home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/obj_dir/sim.o /home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/co19:33
Chips4Makers/home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/sim.c:20:10: fatal error: event2/listener.h: No such file or directory19:33
Chips4Makers #include <event2/listener.h>19:33
Chips4Makers          ^~~~~~~~~~~~~~~~~~~19:33
Chips4Makerscompilation terminated.19:33
Chips4Makersmake: *** [/home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/Makefile:33: sim.o] Fout 119:33
Chips4Makersmake: Map '/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware' wordt verlaten19:33
lkclapt-get install libevent-dev19:34
lkcl dpkg -L libevent-dev19:35
lkcl /usr/include/event2/listener.h19:36
lkclyep that'll be the one19:36
Chips4MakersInstalling symbiflow verilator also installed gcc that did search in /usr/include for includes...19:40
Chips4MakersSwitching to OS version of verilator.19:40
Chips4Makers...did NOT search...19:40
lkcli wonder...19:46
lkclas in: you actually have to work hard to exclude it19:48
lkcllet me see what comes up when i build19:48
lkcl-isystem is what's breaking things19:53
lkcl-isystem /home/verhaegs/anaconda2/envs/libresoc/include -Wall19:53
lkclthat's overriding the default /usr/include for system libraries19:53
lkclso you'll... ah19:53
lkcli know19:53
lkclyou'll have to install libevent-dev in *anaconda*19:54
lkclnot in the main system19:54
lkclthat'll do it19:54
lkclah ha20:15
lkclah hahahahahaa20:15
* lkcl laughs manically20:15
lkclintel's licensing out the x86 ISA... and they expect anyone to take them up on that??20:15
lkclah hahahahaha20:15
lkclah ok just its cores, not the ISA :)20:16
Chips4Makers@lkcl: I restarted with a new venv but he seem to have cached a cc somewhere. I already deleted the build directory in libresoc-litex. Do you know where he could have cached that ?20:17
Chips4Makersmake MOD=xgmii_ethernet -C xgmii_ethernet -f /home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/modules/xgmii_ethernet/Makefile20:17
Chips4Makersmake[2]: Map '/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/modules/xgmii_ethernet' wordt binnengegaan20:17
Chips4Makers/home/verhaegs/anaconda2/envs/libresoc/bin/x86_64-conda_cos6-linux-gnu-cc -c -march=nocona -mtune=haswell -ftree-vectorize -fPIC -fstack-protector-strong -fno-plt -O2 -ffunction-sections -pipe -isystem /home/verhaegs/anaconda2/envs/libresoc/include -Wall -O0 -ggdb   -Wall -O3 -ggdb -fPIC -Werror -I/home/verhaegs/eda/code/pythondata-misc-tapcfg/pythondata_misc_tapcfg/data/src/include -I/home/verhaegs/eda/Chips4Makers/libre-20:17
Chips4Makerstex/build/sim/core/modules/xgmii_ethernet/../.. -o xgmii_ethernet.o /home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/modules/xgmii_ethernet/xgmii_ethernet.c20:17
Chips4Makersmake[2]: /home/verhaegs/anaconda2/envs/libresoc/bin/x86_64-conda_cos6-linux-gnu-cc: Opdracht niet gevonden20:17
Chips4Makersmake[2]: *** [/home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/modules/rules.mak:18: xgmii_ethernet.o] Fout 12720:17
Chips4Makersmake[2]: Map '/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/modules/xgmii_ethernet' wordt verlaten20:17
Chips4Makersmake[1]: *** [/home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/modules/Makefile:9: xgmii_ethernet] Fout 220:17
Chips4Makersmake[1]: Map '/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware/modules' wordt verlaten20:17
Chips4Makersmake: *** [/home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/Makefile:59: modules] Fout 220:17
Chips4Makersmake: Map '/home/verhaegs/eda/Chips4Makers/libre-soc/libresoc-litex/build/sim/gateware' wordt verlaten20:17
lkcl1 sec20:18
lkclyou removed the entire build directory there?20:18
lkclit is symlinks20:18
lkclnot actual files20:18
lkclso you can see where it is symlinked to20:19
lkclwith ls -altr /home/verhaegs/eda/Chips4Makers/libre-soc/litex/litex/build/sim/core/20:19
lkcllkcl@fizzy:~/src/libresoc/litex$ find . -name "xgmii*"20:22
lkclif it's truly not there then remove it from that file20:23
lkclyou *might* have to remove (or update) the /usr/share/lib/python3.N/dist-packages/litex* stuff20:24
lkclthen re-run python3 install (or whatever)20:25
lkclbut you have virtual-env so it may be ~/.venv/somewhere/share/lib/blah20:25
lkclyou can probably find out with:20:26
lkcl$ script20:26
Chips4MakersBut I started with a fully fresh venv20:26
lkclwell, worth checking with this20:26
lkclpython -v20:26
lkcl>>> import litex (or something inside litex)20:27
lkclfrom litex.soc.cores.cpu import CPU20:28
lkclthat would do20:28
lkclthen you can see where "python3 -v" is searching in its import path20:29
lkclif that *really* doesn't reveal anything: strace -o log.txt -ff python320:29
lkclstrace -o log.txt -ff python3 -v20:29
lkclyou were very close before, it was installing verilator using conda that caused it to "override" the standard /usr/include with some random location20:32
lkclrelative to the conda directory20:32
lkclyou needed to install libevent-dev *in the conda* installation and it would have worked20:32
lkclapologies long day have to rest now20:33
lkclpage here20:33
lkclwith the things we learned/fixed20:33
lkclback 45mins or so20:35
Chips4MakersRemoved verilator and gcc from conda env and then got problems with trying the use of the removed cc. I will likely call it a day very shortly.20:35
Chips4MakersI should have quit shell, it was CC env variable in shell...20:40
danielp3344lkcl, lxo: my email is if you still need it20:55
lkcldanielp3344, added you21:40
lkclChips4Makers: ahh nuts :)21:41

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