Thursday, 2021-04-01

Chips4MakersAm close to commiting first cocotb setup for testing with iverilog. Did notice though iverilog 11.0 doesn't like the empty mem init files; it wants a file with the right number of words. Debian currently has v10.3 and that just gives a warning.10:47
lkclChips4Makers, excellent! already!10:54
lkclahh... you're using iverilog? on the mem.init files? why?10:55
lkclwe already have pre-simulation running from verilator, using litex.10:56
lkcli guess, it's nice to use cocotb for both.10:56
* lkcl just checked with litex10:56
lkclyes, litex does build a mem.init with the exact size10:57
lkcleven if it is full mostly of zeros10:57
Chips4Makerslkcl: I want to use exact same cocotb tb on pre-layout and post-layout netlist.10:59
Chips4MakersAs said verilator version from debian is too old for cocotb and I had problems compiling newer version. I am now first going to focus on post-layer simulation and just leave pre-layout with iverilog.11:01
Chips4Makerspost-layer -> post-layout11:01
Chips4MakersAlso, in general I try to avoid litex stuff as much as possible...11:03
Chips4MakersAnd the loops I needed to get through to get the setup working has only confirmed this believe.11:05
Chips4Makerslkcl: So which step should generate the mem init files ?11:07
lkclahh ok.12:06
lkclyes good idea about skipping litex :)12:06
lkclChips4Makers: make ls18012:06
lkclhowever they are all entirely empty12:06
lkclyou could fill them with zeros (of the right length)12:06
Chips4Makersmake ls180 still tries to copy mem_2.init12:19
Chips4Makerslkcl: Which repo URL do I need to use to have write access ?12:30
Chips4Makerslkcl: found it12:34
Chips4Makerslkcl: Don't seem to have write access to libresoc-litex; can fetch through ssh but not push.12:40
lkclChips4Makers, 1 sec will sort that out12:45
lkclChips4Makers: ah yeah i dropped the options (number of srams) down to 2, from the previous 512:46
lkcls/srams/DFF srams/12:47
lkcland forgot to comment out the cp of mem*.inits not created12:47
lkclJean-Paul sent me some code yesterday which does ghdl-based simulation12:50
lkclit contains info / advice how to parse / fix the vst files so they compile with ghdl12:50
lkclcocotb page says "it's possible" (to use ghdl), lots of people saying (dating back 2-5 years) "can't"12:52
Chips4Makerslkcl: Also write for soc.git12:54
lkcleh? doh12:55
Chips4Makerslkcl: I have used ghdl from cocotb in the past.12:55
Chips4MakersI was own compiled ghdl though. ghdl only releases version once a year and then distros may even run more behind.12:56
lkclyehyeh, i think i have the same12:56
lkclit was a pig, i remember that :)12:57
lkclfinding a version that worked with microwatt12:57
lkclghdl --version12:57
lkclGHDL 1.0-dev (v0.37.0-819-g9828b513) [Dunoon edition]12:57
lkcli ran the cocotb test, it's got iverilog build errors, i take it you've managed to work those out?12:58
lkcldid you get "clk_sel_i is not a port of test_issuer"?12:59
* lkcl investigating13:01
Chips4MakersWhat iverilog version ? I have 10.3 in Linux Mint.13:05
lkcliverilog -v13:06
lkclIcarus Verilog version 11.0 (devel) (s20150603-519-g585a023)13:06
lkcli must have built it from source.  it's complaining of missing ports (which aren't used, but hey)13:06
lkclahh i know what's going on13:08
Chips4Makerslkcl: also just pushed new version of idcode.svf13:11
lkclChips4Makers, star13:11
lkcl../libresoc.v:199380: syntax error13:11
lkclSegmentation fault13:11
lkcl*snort* :)13:11
lkcl                            casez (1'h0)13:12
lkcl                            endcase13:12
lkcli know why that is - it's an optimised-out constant13:14
lkclhopefully there aren't any more of those13:16
lkclmodgrammar.ParseError: [line 1, column 1] Expected '!' or 'ENDDR' or 'ENDIR' or 'RUNTEST' or 'SDR' or 'SIR' or 'STATE' or 'TRST' or end of line: Found 'HIR 5 TDI (1f) S'13:22
lkclwhat's that about? :)13:22
lkclpip3 install modgrammar13:23
lkclCollecting modgrammar13:23
lkcl  Downloading modgrammar-0.10.tar.gz13:23
lkclChips4Makers, i disabled pll for now.13:24
lkcliverilog builds and cocotb runs! w00t!13:24
* lkcl wonders if i have to update cocotb, i think i did recently13:27
Chips4MakersI did not make modgrammar dependency of c4m-jtag as it is only needed when using cocotb jtag support. From the other side it is not that big.13:28
Chips4MakersA little smoother than litex :)13:29
lkclFile "/home/lkcl/src/libresoc/c4m-jtag/c4m/cocotb/jtag/", line 228, in run13:31
lkclyield self.execute(p.parse_string(cmds))13:31
lkclwhich is then expecting modgrammar13:31
lkcllol yes13:31
lkcldid you happen to update c4m-jtag?13:32
lkclthis resonates
lkclyes i have the same commit
lkclChips4Makers, any ideas?
lkclbiab, walk.13:39
Chips4MakersSVF support in c4m-jtag is incomplete so that's why I made specific .svf for test. Am first going to focus on post-layout simulation.13:46
Chips4MakersBTW, did push to c4m-jtag on libresoc.13:47
lkclahh ok14:30
lkclChips4Makers: i've started some experimentation here;a=tree;f=ls180;hb=HEAD14:30
lkclfrom Jean-Paul's work he sent me, problems are "fixed" in the coriolis2 vst files by replacing "linkage vss" with "in vss"14:31
lkcli am just going to do an experiment and write a python script which batch-processes an entire directory to do that14:32
lkclChips4Makers, there's two errors.  firstly double-underscores (this comes from ilang files)14:40
lkclsecondly, the keyword "linkage"14:40
Chips4Makerslkcl: OK, maybe I can then focus on .svf that does boundary scan ?14:40
lkclyes good idea14:40
Chips4Makersghdl is quite strict in default configuration but should have option to be more permissive. Did you try that ?14:41
lkcli will let you know when i have something that will need your experience having done the cocotb-vhdl before14:41
lkclahh no :)14:41
lkclhow's that work?14:42
lkclghdl --help is terribly short on detail :)14:42
lkclghdl --options-help looks promising14:42
lkclahh probably --relaxed-rules14:43
Chips4Makersthat what I was aiming at14:44
lkclok apparently it's for checking not compiling14:48
lkclurrr there are outputs that get used as inputs.  i'm using experiment10 as a quick test14:56
lkclexample: posjtag_rst is an output as declared by the C4M-JTAG FSM module14:57
lkclit is used as an *input* into some circuits such as deciding what to do with tms14:58
lkclwill try different standard versions15:00
lkclha! --std=08 does the trick15:00
lkclok, getting somewhere.  i have a successful build using experiments10 VST files15:15
lkclfrom corona.vst (and everything it needs)15:15
lkclokaaay found this
Chips4MakersRunning ghdl from cocotb should be with SIM=ghdl and defining VHDL_SOURCES. docker container ghdl/cosim:vunit-cocotb should show an environment with working cocotb+ghdl setup.15:23
Chips4MakersMy local setup does currently not work, likely because I upgraded ghdl.15:23
lkclChips4Makers: ha! actually generated a test.ghw and it looks "sane"15:46
lkclif you'd like to give that a shot the vst source for experiment10 is here
* lkcl need to get up and walk about again :)15:48
lkclmust do README15:48
Chips4Makerslkcl: Where do I find the order of pins added to boundary scan ?16:13
Chips4MakersOK, found it in __init__ of class LibreSoC.16:15
lkclrun "make mkpinmux"16:38
lkcl1 sec...16:38
lkclChips4Makers: it's created automatically through the class Pins;a=blob;f=src/soc/debug/;hb=HEAD#l3616:42
* lkcl tracking that through, 1 sec16:42
lkcli just realised the order can change because the pinmux program generates non-ordered dictionaries16:42
lkclChips4Makers: the purpose of the Pinmux is to auto-generate an ordered pinset precisely so that it is unnecessary to manually type out hundreds of pins16:51
lkclwhich could change16:51
lkclChips4Makers, experiments10 ghdl cocotb passes the first unit test (IDCODE)!17:02
lkclfails on the reset one but hey17:02
lkclHA! got it to work17:35
lkclChips4Makers, using for the pin-definitions is quite important, it is a straight dictionary but now an OrderedDict17:36
lkclthere was the possibility, previously, of pin order being completely mixed17:36
Chips4Makerslkcl: Actually best order in scan chain is clockwise or counter clockwise as they are in the IO ring starting from the JTAG pins. This way the boundary scan shift register can naturally follow the IOs. Not critical for this tape-out.19:00
Chips4MakersNice about ghdl + cocotb19:00
Chips4MakersBoundary scan does not work for the moment. Debugging is for tomorrow.19:01
lkclChips4Makers: yeah :)19:35
lkcli may move things about (later tonight),19:35
lkclunless you tell me that you've work not-yet-committed19:36
Chips4MakersNP, I should be able to adapt.19:36
lkclprogrammerjake: lol22:24
lkclChips4Makers, all done, you'll need:23:43
lkclmake gitupdate mkpinmux ls180_verilog_nopll23:44
lkcltomorrow.  that should do it23:44
lkclconfirmed that still passes23:45
lkclnow here as a submodule lkcl@fizzy:~/src/libresoc/soc/src/soc/soc-cocotb-sim/ls180/pre_pnr23:45

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