programmerjake | I got my first commit in rustc proper! https://github.com/rust-lang/rust/commit/d9a5df669c45204daa5e10f5221ff82026fef9e6 | 05:53 |
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programmerjake | just adding compile tests | 05:54 |
klys | have some chips been fabbed already? | 06:24 |
programmerjake | not with a full cpu yet, the deadline for what was originally a december (iirc) tapeout has been pushed back to last fri iirc, assuming all goes as planned we'll have chips in a month or two | 06:27 |
klys | wonderful. | 06:27 |
programmerjake | there was a chip made with just some test gates and stuff, march 2020 or so | 06:27 |
klys | yes I was looking. who has that? | 06:28 |
programmerjake | just Staf iirc | 06:28 |
klys | has software been developed for it | 06:28 |
programmerjake | the march test chip? it has no cpu, can't run software. | 06:29 |
klys | okay then | 06:29 |
programmerjake | the one that's hopefully taping out now? yes, though iirc it only has a few kB ram so don't expect to run full linux | 06:30 |
klys | why so little ram when larger spi chips are cheap? | 06:30 |
programmerjake | because the ram is on-board. it can access much larger external ram, but i can't remember if we got that wired up | 06:31 |
klys | I have a riscv k210 sipeed maix dock for example, and it has 8 MB (32 Mbit), and the spi chip is obsolete on digi-key iirc. | 06:32 |
programmerjake | I'd expect that that's actually 8MB flash, which is quite different than ram | 06:33 |
klys | mm right | 06:33 |
klys | where in nmigen is the wiring to the (ddr?) ram chip, if you know today? | 06:35 |
programmerjake | the chip has a sram block designed by staf, or, if that's not working, we're going to have 256B of ram made from flip flops | 06:35 |
programmerjake | the current design doesn't support ddr ram yet | 06:35 |
programmerjake | iirc | 06:35 |
klys | edo? | 06:36 |
programmerjake | haven't seen that acronym before... | 06:36 |
klys | edo ram is the ram that came before ddr | 06:36 |
klys | like pc133 | 06:37 |
programmerjake | ah. i've only ever seen it called dram and sdram | 06:37 |
klys | the external ram, could you describe it a little | 06:38 |
programmerjake | i don't know that we have one...we could read flash from sw though. check with lkcl, he should know for sure, I may have missed it | 06:39 |
klys | okay thank you jake | 06:39 |
klys | lkcl ^ | 06:40 |
lkcl- | all peripherals are done with an external peripheral generator | 12:37 |
lkcl- | which we'll be replacing in future versions | 12:38 |
lkcl- | that peripheral generator has support for generating sdram | 12:38 |
lkcl- | it's automatic | 12:38 |
Chips4Makers[m] | klys: Measurement report on test chip: https://chips4makers.io/blog/nlnet018tv-measurement-report.html | 23:30 |
klys | chips4makers[m], that's wonderful, thank you. | 23:46 |
programmerjake | Chips4Makers that's quite nice! | 23:50 |
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