| lkcl- | Chips4Makers[m]: great report. good to hear about the SRlatch. was the FlexLib Standard Cell Library also part of the test? | 02:52 |
|---|---|---|
| Chips4Makers[m] | lkcl-: the rest of flexlib is a subset of of nsxlib with same schematic, it was not considered needed to be tested. | 08:48 |
| lkcl- | Chips4Makers[m], ahh okay | 10:28 |
| lkcl- | Chips4Makers[m], how important is it to you to have the PLL and the SRAM respectively in the 180nm tape-out? | 10:55 |
| lkcl- | by that i mean - and i appreciate that this is a really tough choice - is each of them so critically important to you that it is more important than missing the 9th Jun deadline? | 10:56 |
| lkcl- | ironically, one advantage of missing the 9th jun deadline is, we have 2 days to complete the NGI POINTER | 10:57 |
| Chips4Makers[m] | lkcl-: We already got extension from imec from last week Wednesday for delivering the GDS. I'm afraid we'll need to move the tape-out. Let's relax now and then I need to look closer at the testing of the chip, as it will likely not meet NGI0 deadline. | 11:16 |
| lkcl- | Chips4Makers[m], ok sensible | 11:23 |
| lkcl- | well, we can ask to cover it with NGI POINTER | 11:24 |
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