Thursday, 2021-07-08

sasi8985Hi all, I now want to develop a core in verilog....can i take small subset like 32 instructions from power isa and develop....finally i want run micropython on that core....s this possible?06:01
programmerjakeif all you care about is writing a really small embedded core, using RV32I might be better, since it's really small.06:55
programmerjakeOpenPower works best in bigger systems. if you look in appendix G of the OpenPower v3.1 ISA spec, it has a list of instructions,06:55
programmerjakethe rows with XXXX are the ones needed by a basic OpenPower cpu -- it looks like the minimal compliant subset is something like 50-100 instructions06:55
programmerjakenow that I look at it again, it lists instructions like cdtbcd Convert BCD to declets (for decimal FP), but it is listed in the minimal required subset -- maybe we should raise this issue with OpenPower, lkcl ?06:58
programmerjakesasi8985 if you like, you could look at which is a RV32I cpu I wrote for teaching purposes in 2 days, it might be useful for you to write something like it07:00
sasi8985programmerjake: problem...i wanted to learn the basic processor design flow from rtl to os booting07:04
sasi8985So,RV32I is good for start07:06
programmerjakewell, that one has close to no software, but should be able to run larger C/C++/Rust programs since I implemented every user-mode instruction in RV32I07:06
programmerjakeit has a memory-mapped output port, but no input07:07
sasi8985okay..i will look at it07:08
programmerjakeI didn't implement machine mode or CSRs though, so the standard boot assembly won't work07:08
programmerjakeit may have bugs, since I didn't test it that much07:10
sasi8985programmerjake: does ram.ld initialize ram in cpu and loads main.cpp?07:10
programmerjakeram.ld is the linker script, it tells the linker where in memory it should pack the code and data07:11
programmerjakethe cpu just has the ram start initialized to the generated binary07:11
programmerjakeit loads the binary and sticks it into the generated HDL here:07:12
programmerjakeso, it won't work unmodified in an ASIC since they generally don't support having initialized ram, but it will work fine in some FPGAs (Xilinx Spartan works that way) and in simulation07:15
programmerjakeI just simulated it07:15
programmerjakeit's designed to be simple to write and understand, not to be fast -- it uses no pipelining whatsoever07:16
sasi8985okay...actually i don't know python, i know i wanted to first write rtl(with pipeline) and then worry about os...07:20
sasi8985in verilog with $readmem $writememcan we load ram with binary of main.cpp?07:22
programmerjakethe binary is created by software/Makefile07:29
sasi8985so, if binary is loaded then i can run programs on rtl...write?07:32
programmerjakeyou can make it spit out verilog (idk how readable though) by running:07:33
programmerjake(cd software; make)07:33
programmerjakepython3 simple_riscv_cpu/ generate cpu.v07:33
programmerjakeit runs the hello-world program when you simulate the cpu, or immediately after reset07:34
sasi8985okay will try this....thankyou programmerjake :)07:35
programmerjakeyou will need clang-11 to build software/*07:36
programmerjakeyou don't need to install a risc-v specific toolchain, any old clang-11 will do07:36
programmerjake(as long as the risc-v backend was compiled in, it usually is)07:37
programmerjakeyou can get the version I used from:
*** xws is now known as wxie16:06
lkcltaking a look at the Compliancy Sections of v3.0C - which are really hard to interpret - "Decimal floating-point (DFP)" is part of the optional linux subset18:31
lkclwhich we are *not* implementing - we are implementing the *SFFS* subset... oh and then adding an MMU.18:31
lkclScalar binary floating-point (FP) is again optional for the SFFS subset18:31
lkclbut err yeah i'm not seeing anything that says BCD is optional, anywhere18:31
lkclthere's only 3 - cdtbcd, addg6s, cbcdtd18:31
programmerjakeyeah, my point is it should have been in the decimal fp subset and instead it's in the base isa18:32
lkclwell apparently the BCD instructions are used for accelerating printf and other things showing decimal numbers as ASCII18:33
programmerjakemaybe we can talk them into splitting out another extension: integer decimal18:33
lkclso i can kiinda understand the justification for having them18:33
lkclif it was more than 3 instructions (say 15 or greater) i'd say yes to that18:34
lkclbut only 3? mmm... :)18:34
programmerjakewell, the add6g maybe, the other two are only used for decoding/encoding the base 1000 encoding used by decimal fp, I don't think they're useful for much else18:35
*** xws is now known as wxie18:35
programmerjakeaddg6s doesn't have any search results in glibc18:38
programmerjakeneither do the other two18:39

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