Tuesday, 2021-07-27

ghostmansd-pclkcl: I'm struggling with csv format; let's consider two entries from decode1.vhdl and minor_31.csv06:48
ghostmansd-pc(ALU,  NONE, OP_AND,       NONE,       RB,          RS,   RA,   '0', '0', '1', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC,   '0', '0', NONE), -- andc06:48
ghostmansd-pcunit  fac   internal      in1         in2          in3   out   CR   CR   inv  inv  cry   cry  ldst  BR   sgn  upd  rsrv 32b  sgn  rc    lk   sgl  rpt06:49
ghostmansd-pcthe registers follow like this: [in1, in2, in3, out] for vhdl06:50
ghostmansd-pcam I right that csv keeps these in order [in3, in2, in1, out]?06:52
ghostmansd-pcthe legend tells it differently: opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form,CONDITIONS07:05
ghostmansd-pcso, we have [NONE,RB,RS,RA], vs [RS,RB,NONE,RA] for andc, but in1 in vhdl != in1 in csv07:10
ghostmansd-pcalso I tried $(python3 src/openpower/decoder/test/test_power_decoder.py), but even without my changes it fails (all 6 tests)07:25
ghostmansd-pcHm. For things like OP_ADD, the order is actually the same.07:56
ghostmansd-pcI _think_ I added addg6s to csv, but I'm not sure whether it's correct, given the confusion above.07:58
ghostmansd-pcThat's how I _suppose_ it should look: 0b0001001010,ALU,OP_ADDG6S,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,addg6s,XO,07:58
ghostmansd-pcFWIW, I cannot push even to branch in openpower-isa, it has read-only permissions.08:07
programmerjakelkcl, I just now noticed all the stuff in several days ago about pia and issues with maturin, I lost the notifications on my phone...08:21
programmerjakeI'll work on fixing it tomorrow08:28
programmerjakelkcl said:08:41
programmerjake> this is a lesson for you that the current (fast, completely unstable) development pace of rust will not teach you, because they themselves haven't learned it08:41
programmerjakethat's not an issue with rust itself (which does have good stable releases), but an issue with how maturin (a totally separate project) recommended specifying the dependency on maturin, they have since changed their recommendation to actually include a version number.08:41
programmerjakebasically, what happened is 8 mo ago, when I last worked on pia, pia didn't specify which version of maturin it needs, and since then maturin started to use the new manylinux package naming scheme (pep 600) by default, that new package naming scheme is only supported in versions of pip newer than included in debian 10. pip has supported that since pip 20.3, released Q4 2020.09:07
programmerjakematurin's reasoning for switching the default: https://github.com/PyO3/maturin/pull/525#discussion_r62749392209:11
lkcltoshywoshy: openpowerbot's gone walkies again :)14:38
lkclit's on OFTC though14:38
lkcldropped from #microwatt as well14:38
ghostmansdlkcl: Hello Luke! Could you, please, take a look if I have write permissions on openpower-isa?15:15
ghostmansdI made some small commits today, but they're not in repository yet, since I cannot push even to branch.15:15
ghostmansdAlso, could you check, please, backlog regarding csv:hdl map and test_power_decoder.py, when you have time?15:17
lkclghostmansd: hmmm, since doing the upgrade/downgrade of gitolite3 it's all gone pearshaped. again.15:51
ghostmansdIs it related to an upgrade? I recall I had only libreriscv write permissions...15:52
lkclghostmansd: i haven't made *any* changes to the gitolite3 config, since yesterday.15:52
lkclwhat error are you getting?15:53
lkclboth www-data and gitolite3 both need write permissions to the repo, that's part of the issue15:53
lkclcan you please try "git push" again15:54
ghostmansdI have only R near openpower-isa repo. Let me re-check though, and I'll post the error.15:54
lkcli haven't changed anything so that's a wtf15:55
lkcloh hang on, somehow the underscore is back15:55
lkclok try again15:56
lkclprogrammerjake: thanks for taking care of that.  it's part of the responsibility, if you are going to use rust, that there exist stable reproducible builds.16:18
lkclwhen you recommended "pip install pip" it is now in the archives - forever - we now have to watch out for people in the future trying to do exactly that16:19
ghostmansd-pclkcl: I checked $(ssh gitolite3@git.libre-soc.org), it's fine now, openpower-isa has RW now.16:31
ghostmansd-pcBefore I push, is there some simple check to ensure I haven't broken anything? For now, I've changed power_enums.py and minor_31.csv.16:33
lkclsimple.. mmm.... :)16:33
lkclrun some of the tests.16:34
ghostmansd-pcAh, BTW, I still desperately need your help on csv vs hdl, at least on ANDC example. :-)16:34
ghostmansd-pcAnd also I didn't manage to successfully run test_power_decoder.py.16:35
lkclnormally i would suggest running the HDL co-simulation ones, these run eeeeverything (takes about 1/2 an hour)16:35
lkcl1 sec16:35
ghostmansd-pcEven on vanilla master.16:35
lkclah if that produces an error then don't for goodness sake commit16:35
ghostmansd-pcPerhaps I've been doing it wrong? $(python3 src/openpower/decoder/test/test_power_decoder.py)16:36
lkclit means.. 1 sec16:36
lkclno just run that one straight16:36
lkclyep that's correct16:36
lkclwhat happened?16:36
ghostmansd-pcDon't I need to re-build something?16:36
lkclcan you do a "git diff" and upload it to pastebin?16:37
lkclthen i can check it16:37
ghostmansd-pcI can, but it fails even on master.16:38
ghostmansd-pcpastebin: You have exceeded the maximum paste size of 512 kilobytes per paste. PRO users don't have this limit!16:38
lkclerrr what did you do?  that's completely excessive, it means you committed something that definitely should not have been committed16:39
lkcllikely a binary file, or an output log file, or something16:39
lkclemail it to me i'll take a look that way16:39
lkclone change to power_enums.py and one change to minor_31.csv should be about a 512 *BYTES* paste.16:40
lkclunder no circumstances should it be 512k k16:40
lkcllet me know when you've sent it, i can refresh email16:41
ghostmansd-pcI've tried to send the log file :-)16:42
ghostmansd-pclet me simply put stderr output16:42
lkcli don't need the log file, i need the "git diff"16:42
lkcli need to know what you've edited so that i can take a look16:43
lkclif you send me the log file on some "unknown" changes, i have no idea what they are16:43
lkclyep, i need the *changes* you've made, not the results *of* those changes16:44
lkclotherwise, i have to guess what changes you made16:44
lkclok brilliant16:44
ghostmansd-pcbut again, this is reproducible even on master16:44
ghostmansd-pcso I guess my changes don't matter16:45
lkclok give me a sec to run it here16:45
lkclah. right.  that unit test.16:45
lkclno, it's massively out of date16:45
lkclthose changes look perfectly reasonable to me, let me check they don't do "damage" by running the HDL test_issuer_svp64.py16:47
lkclthese are git am-apply format, aren't they?16:48
lkclnggggh :)16:50
ghostmansd-pcI quickly did $(git diff origin/master..HEAD)16:50
ghostmansd-pcbut I can send $(git format-patch origin/master)16:51
lkclyou committed some of these... ok, the order's a little awkward for... no that's ok16:51
lkcli'll add them by hand16:51
lkclexcellent, got them all16:52
* lkcl running test_issuer_svp64.py16:53
lkclok that's great, go ahead and git push16:54
lkclat this low level, even the simulator ISACaller, if any of the simulator tests fail it's indicative of a problem16:54
lkclwe did add some new column formats last year, had to really seriously plan it out, actually write a program which added in the columns and *rewrote* (overwrote) the CSV files with new versions16:55
ghostmansd-pcshould I launch test as $(python3 test_issuer_svp64.py), when I do more changes?16:56
lkclif you have the soc repo checked out, yes.16:56
lkclthe more unit tests you can run the better, but with some of them being very long you have to use pragmatic common sense16:57
ghostmansd-pcI also have a question regarding hdl/csv discrepancy. When I took a look at those, I selected andc instruction, and it seems it uses different "inX" arguments.16:58
ghostmansd-pc(ALU,  NONE, OP_AND,       NONE,       RB,          RS,   RA,   '0', '0', '1', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RC,   '0', '0', NONE), -- andc16:58
lkclso, a bit of background16:58
lkclthe original POWER1 was an internal *microcode-RISC* architecture16:59
lkclyou can see that clearly from OP_ADD, it's just one (RISC) OP_ADD with 20+ instructions changing carry-in, carry-out, invert-result and invert-input-RA16:59
lkclvery cool, neat idea17:00
lkclso, when it came to doing LD-ST they wanted to do a ton of modes that you don't normally see in other RISC architectures17:00
lkclshift-and-mask in particular17:00
lkclin terms of the number of gates, Shift is *really* expensive, as big as a Multiply, like 12,000 gates or something mad17:01
lkclthis was far too many to put into something as "simple" as a LD/ST17:01
lkclso what did they do?17:01
lkclthey only put in **ONE** Shift-and-mask engine...17:01
lkcl... and allowed the LD/ST instruction to pass *PARTIAL* results to the Shift-and-Mask pipeline17:02
lkclhow did they do that?17:02
lkclthey did it by treating RA RB RC RT and RS internally as *broadcast* buses17:02
lkclsuch that the LD unit could grab the raw data from the memory bus and then send it on over the "RS" bus to the Shift-and-Mask pipeline, using what's termed "Operand Forwarding"17:03
lkcland that's why the operands are all over the shop17:03
lkclsome are RS in the 3rd column, where the 1st column is empty17:04
lkcletc. etc. etc.17:04
lkclMicrowatt decided to respect this design choice17:04
lkclLibre-SOC is designed differently.17:04
lkclso i moved the operands into "sane" positions.17:04
lkclso where decode1.vhdl says NONE,RB,RS17:05
lkcli went, "i am NOT adding a 3rd register to the Logical Pipeline then running it empty 100% of the time!"17:05
lkcland simply moved RS to position 1.17:05
richardwilbur[m]Interesting story behind a fundamental difference in the implementation!17:08
lkclrichardwilbur[m], yeh.  microwatt has one single Scalar pipeline, we have 10.17:08
lkclall separate17:08
lkclso in Microwatt they *have* to have 3-in 2-out for the ennntirrree (one) pipeline17:09
richardwilbur[m]Even in our first Si?17:09
lkclwhereas i split out Logical pipeline to a separate module17:09
lkclyes, of course17:09
lkcland it turns out that, actually, all Logical operations only actually have 2-in (not 3-in) 64-bit regs, and only 1-out (not 2-out) 64-bit regs17:10
lkclso... errr... remind me why we would add extra wires that would never get used?17:10
lkcland why would we have them numbered 2 and 3 when 1 is never used?17:11
richardwilbur[m]Sweet!  So our first iteration is superscalar, it sounds like.17:11
lkclit's quite sane logic17:11
lkclno, not at all.17:11
lkclit's a FSM.  IPC of well below 0.217:11
richardwilbur[m]Is that a limitation of the decoder/dispatch or the retirement?17:13
lkclsee code comment at top17:14
richardwilbur[m]Wow, so we are going to first Si with the first simple single-issue dispatcher?17:17
lkclyes. otherwise it would have been necessary to write something far more complex within a very short amount of time17:18
lkcland we didn't need the hassle17:18
lkclnor a need for high performance17:18
lkclit was more important to get *something* functional than it was to get something functional *and* highly optimised17:19
ghostmansdWow, thank you for an interesting explanation!17:20
lkclghostmansd: :)17:20
lkclPOWER1 is like... 199417:20
ghostmansdWell, it's quite confusing when you don't have this background :-)17:20
richardwilbur[m]Yes, I understand.  Did the vector unit make it into first Si over just 32-bit instructions?  (That would still offer a considerable “turbo” mode.)17:21
lkclit was in the original research paper17:21
lkclrichardwilbur[m]: no, no SVP64.17:21
lkclit would have taken us quite a way over the gate count17:21
lkclplus, the development of SVP64 in HDL was *after* the feature freeze decision for the ASIC17:22
lkclghostmansd: saw the commits, looks great.  comments are good too.  am just re-running the unit tests.17:22
ghostmansdWhen legend tells you one, the table tells you other, and the most obvious test you found doesn't work, it's somewhat confusing. It's a nice story, and I think it deserves to be put somewhere besides this chat.17:22
lkcli'll run the "big" one, here17:22
richardwilbur[m]Okay.  I had a misconception of how much you folks packed into the first Si before I started working on it.17:23
lkcli had to carry on developing SVP64 so that's why i added the compile-time option in issuer_verilog.py to take it out17:24
lkclghostmansd: the "big" one to run is this: python3 simple/test/test_issuer.py nosvp6417:24
richardwilbur[m]Ah, great idea!17:24
lkclthat takes 20-25 mins here or so17:24
lkcl"nosvp64" takes out all the Draft Vector ISA stuff from the HDL17:24
lkcloff out for a walk, with that running17:26
richardwilbur[m]Enjoy some fresh air and sunshine!17:27
richardwilbur[m]It was very smoky in Montana when we left.  We are enjoying clear air in western Washington right now.17:29
lkclrichardwilbur[m], nice :)18:04
lkclghostmansd: no errors.  all good18:04
ghostmansdGood, I'll continue working on this tomorrow. Should I issue $(simple/test/test_issuer.py nosvp64), or there are more tests that should better be checked?18:18
lkclok so test_issuer.py takes so long to run that i tend to only run it just the once before doing a git push.18:19
lkclif i have several *small* commits (which is preferred: one purpose, one commit), i run much shorter tests18:20
lkclthen *only* just before git push do the large (long) one.18:20
lkclyou just have to use good sense18:20
lkclif however you are adding something that is not being used by anything else (no dependencies), such as an entirely new unit test, or an entirely new module that doesn't even get used anywhere at all18:21
lkclthen it makes no sense whatsoever to waste an hour running tests.18:21
lkclghostmansd: i fixed test_power_decoder.py btw18:27
lkclthe bigendian flag was set inverted18:27
richardwilbur[m]That seems like a pretty big deal.  Good find!18:28
lkclit's a very early unit test, that's redundant effectively, because decoding is used for everything.18:29
lkclmeeting programmerjake richardwilbur[m] klys lxo23:14

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