Sunday, 2021-09-05

rtharstonHello libre-soc! I found out about the project yesterday and have been reading about it. I am really intrigued by the goals and what you have achieved so far!05:23
rtharstonI don't know how much time I'd be able to dedicate to helping right now due to my full-time job and another project I am trying to wrap up, but I would like to help out in some way.05:24
rtharstonI haven't done any work in digital logic or HDL yet, but my digital logic class in school was probably my favorite and I've always wanted to do more.05:26
rtharstonThe top item on my list of projects I want to do is design a CPU and a some supporting chips to make a single board computer of my own, mostly so I can learn all the components. Working with firmware code the last two years at works as helped me learn a lot more about the low level aspects of computers, but I am excited to learn even more, and I think that helping work on this project would be a great way to help the world while I learn05:28
rtharstonmore about the areas I have always wanted to learn.05:28
rtharstonI tried to sign up for the mailing list but haven't seen a confirmation e-mail yet, so I decided to jump on here and give IRC a whirl for the first time (the mailing list is the first of those I have signed up for too actually).05:30
rtharstonI won't bore you all with too much more about me for now. I look forward to meeting you all!05:31
rtharstonI'm starting to get this IRC thing figured out. I also just found where the chat log is on libre-soc's website, so now I'm not as worried that all my previous messages disappeared when I closed my client. :D While reading through the HDL workflow page I also saw something about checking the spam folder in Gmail so I did that and wouldn't you know, that is where my mailing list confirmation email was, so I'm responded to that now.06:23
rtharstonI don't work Sunday so I'll be back Monday to keep reading through the site and perhaps I'll have enough time to take a look at some of the code and learn more about this fascinating nmigen tool. I never thought that using Python to write scripts at work could be useful when designing an SoC!06:25
rtharstonThanks for all the great resources, and ttyl!06:25
lkclrthartson: great to hear from you11:20
lkclyes, looking in spam folder is pretty normal these days11:21
lkclyou should see this in the irclogs11:21
lkclthe most extreme use of python in the project involves this11:23
lkclwhich, alongside the pipeline API, involves11:23
lkcl* overriding arithmetic operators __add__ __gt__ __xor__ etc to provide dynamic partitioned SIMD11:24
lkcl* overriding nmigen's low-level behaviour (TODO) so that "with m.If(x > y)" does the right thing11:25
lkcl* runtime dynamic creation of multiply-inherited objects by providing a Base Class mix-in from a *compile-time* specified base class11:26
lkclthat latter is so that we can pass in a different pipeline "type" - at compile-time - one that is Dynamic-SIMD-aware instead of one that is, well... not11:26
kylelWriting tests, am curious what is supposed to happen when a 32bit is signed extended17:23
kylelinto a 64bit17:24
kylellooking at extswsli17:24
lkclkylel, basically it means "take bit 31 and shove it across bits 32-63"17:39
lkclfor some reason known only to IBM, they chose to use *MSB0* numbering.17:40
lkclthis creates merry hell and havoc for pretty much anyone and everyone for a period of several weeks to *months*, as your brain is literally re-wired to comprehend arse-backwards numbering17:40
lkclso when i said, "take bit 31 and shove it across bits 32-63" that's NORMAL industry-standard >>>**LSB0**<<< numberin17:41
lkclin the Power ISA specifications, you will instead see this:17:41
kylelok, got the result back from the simulator and it was 0xffffffff......17:42
lkcl"take bit 63-31 (i.e. bit numbered 32) and shove it across bits (63-32) through to (63-63) aka bits numbered 31 to 017:42
kylelthrew me for a loop17:42
kylelso I working as designed lol17:42
lkclyeah, if the 32-bit number was "negative" then the top 4 bytes all contain 1s17:43
kylelYep, it was.17:43
lkclyou literally have to unscrew the top of your head, take your brain out, turn it round 180 degrees and put it back in, in order to understand Power ISA spec numbering17:43
kylelgotta love big blue17:47
kylelLooked around, is it possible to retrieve the carry registers from sim?18:36
Las[m]When trying to follow, I get `[ERROR] CoreToChip.buildChip(): Pad "p_sys_pllclk" refer net "sys_pllclk" which do not exist in core "ls180".`18:48
Las[m]Does anyone know what this means?18:48
programmerjakertharston: welcome!19:12
lkclkylel, yes, sim.CR.19:17
lkclsee... errr...19:17
* lkcl goes to find an example19:17
lkclsim.crl to access the CRs by "field" (0-7)19:19
lkclbear in mind these are, once again, in MSB0 number order i.e. *inverted* even from the underlying 32-bit CR they are in!19:19
lkcland is the *actual* 32-bit CR19:20
lkclthere's a class called SelectableInt which takes care of the mind-bending MSB0 order19:20
programmerjakelkcl: I'm planning on working on adding the additional CSV columns to budget-sync tomorrow, i'll be busy today, my housemate's grandparents are visiting19:20
lkcland *another* class called FieldSelectableInt, where you can pass a SelectableInt to it *and* a list of bit-field mappings, and you can access the FieldSelectableInt as if it was a separate object, but actually maps (for you) onto the underlying SelectableInt19:21
lkclprogrammerjake, awesome.  nice19:21
lkclboth are in MSB0 order so bear that in mind.19:22
lkclfrequently you will see something "x.value"19:22
kylelthank you, yeah been using selectableint19:22
lkclyeah it "takes care of" the merciless mind-bending bit-order for you :)19:23
lkclwe did it because we had to: it meshes with the specification basically19:24
lkclLas[m]: drat. that'll take me some time to investigate.19:24
Las[m]lkcl: So the code is broken?19:24
Las[m]If it is broken then it isn't very important I assume, since experiments9 itself won't be very valuable then19:25
lkclno - it just means, "it'll take some time to investigate"19:25
lkclin the meantime try this branch: LS180_RC7_FINAL19:25
Las[m]Thanks, of soclayout?19:25
lkclalso, bear in mind, we had to use a specific tag of yosys. it's in the build script.19:26
Las[m]Oh yeah.19:26
Las[m]Thanks, I'll try using that version of yosys19:27
lkclgit checkout ^^19:27
lkclif it doesn't "work" we'll need to do an in-depth investigation, triaging exactly what versions of exactly what software you've installed etc. etc.19:28
lkcland do a full repro investigation19:29
lkclwhich, honestly, i will need a bit of a mental run-up to prepare for :)19:29
Las[m]Welp, even with the older Yosys it still fails.19:48
Las[m]I'll try and replicate the exact steps in Debian rather than in Nix19:49
Las[m]programmerjake: Are you still working on Kazan or is that no longer relevant for Libre-SoC/20:56
programmerjakeI'm still working on it, but have been distracted with other stuff, the most recent major work was working on a new math library shared between Kazan and Rust's standard library:20:57

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