Monday, 2021-09-06

Chips4Makers[m]Las lkcl For tape-out the Verilog has been patched manually to fix difficulties with litex generated code. I assume that is the problem you are seeing.09:38
ghostmansdHi all, it seems I'm out for at least a week. My daughter got sick, so I'll be concentrating on parental deeds. I might be available occasionally, but it's not a likely scenario.14:26
lkcltotally understand, ghostmansd14:34
ghostmansdThanks!14:35
ghostmansdThat said, if there are questions which need my reaction, my both e-mails still work :-)14:35
ghostmansdIt's just that the answer perhaps won't be immediate14:36
programmerjakehope she feels better!15:08
ghostmansdprogrammerjake: thank you for the best wishes! :-)15:41
Las[m]<Chips4Makers[m]> "Las lkcl For tape-out the..." <- So after running `make ls180_4ksram_verilog_build` in the `soc` repository to "build the litex libresoc SoC with 4k SRAMs", the output of that command is manually edited?17:46
Las[m]Chips4Makers: ^17:46
Chips4Makers[m]yes; details to be provided by lkcl as he did last version.18:55
Las[m]That's quite unfortunate19:18
Las[m]Are there any plans to fix this?19:18
Las[m]Or is this unavoidable?19:18
lkclah yeah, i made one change - the name of the module ls1804k is changed to module ls18019:47
lkclit's a trivial thing that can be done with sed19:48
lkcli just didn't get round to ever doing it19:48
lkclLas[m], one thing, you do need to use the correct branches.19:51
lkclsrc/coriolis$ git branch19:51
lkcl* devel19:51
lkclthis is part of the automated dev-env-setup script19:52
Las[m]yeah I'm already using the devel branch of Coriolis19:52
Las[m]When I get to the point where I can get `make ls180_4ksram_verilog_build` to work, I'll see what `sed`s I'll have to do to get it working with Coriolis and such19:53
lkclthey're completely independent19:54
lkclfor the very reason that Jean-Paul Chaput requested that we commit the auto-generated verilog19:54
lkclwhich, normally, i do not approve of19:54
* lkcl running ./build_full_4k_sdram_recon.sh to make sure it's working19:55
lkclok that's now doing "Building RoutingPads" so it should be good19:57
Las[m]lkcl: Have you tested `build_full_4ksram.sh` from `experiments9` lately?20:00
lkclthere's basically no commits - at all - since the tape-out20:23
lkcland it's been long enough i can't exactly remember which one of the build scripts i ran20:23
lkclso whatever worked then *will* work now20:23
lkcl(another advantage of Jean-Paul's advice)20:24
lkclmy fingers however are telling me to run the build_full_4k_sdram_recon.sh script20:25
lkcl(coriolis2)lkcl@fizzy:~/soclayout/experiments9$ ls -altr *.sh20:26
lkcl-rwxr-xr-x 1 lkcl lkcl  333 Nov 27  2020 build.sh20:26
lkcl-rwxr-xr-x 1 lkcl lkcl  806 Apr  9 12:03 build_full.sh20:26
lkcl-rwxr-xr-x 1 lkcl lkcl 1204 Apr 24 13:54 mksym.sh20:26
lkcl-rwxr-xr-x 1 lkcl lkcl  972 Apr 28 10:13 build_full_4ksram.sh20:26
lkcl-rwxr-xr-x 1 lkcl lkcl 1335 Jun 15 12:37 build_full_4ksram_recon.sh20:26
lkclyep that looks right. it was the last one i edited20:26
Las[m]Hmm, thanks, I'll try that!21:09
Las[m]Unfortunately still get `[ERROR] CoreToChip.buildChip(): Pad "p_sys_pllclk" refer net "sys_pllclk" which do not exist in core "ls180".`21:54
Las[m]lkcl: Where is `ls180` defined?21:54
Las[m]ah nevermind, I figured it ou21:55
Las[m]t21:55
Las[m]I can see it's defined21:56
kylelI'm ready to push shit_rot caller22:00
kylelmake that shift lol22:00
kylelquite a typo22:01
kylelAnyways need perms22:04
avlHi all! I have set up and ready to hack, I guess. I have downloaded packages and now I need a way to verify, that everything as expected. Also I read https://bugs.libre-soc.org/show_bug.cgi?id=550 and I wonder what is the current status on that? Which repo to hack and what sources migt be useful?23:48

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