| Las[m] | Also: What process should I use for upstreaming my work? | 00:10 |
|---|---|---|
| Las[m] | Another question: Is there a guide for running the tests? | 12:30 |
| lkcl | Las[m], that's up to Jean-Paul as part of his decision and responsibility to maintain and develop the coriolis2 VLSI suite. i _believe_ he said "long-term, yes". | 12:53 |
| lkcl | running the benchmark test suite (alliance-check-toolkit) is a matter of typing "bin/go.sh", so... ah.... not really :) | 12:54 |
| lkcl | if you're modifying things for libre-soc you've already agreed to our Charter so just ask for the repo write access, explain in advance what you intend to do, and go for it | 12:55 |
| lkcl | if you mean alliance/coriolis2 modifications then you should join the alliance-users mailing list and ask there https://www-soc.lip6.fr/wws/info/alliance-users | 12:56 |
| Las[m] | lkcl: I mean Libre-SOC test suite, and upstream to the soc repository | 13:43 |
| Las[m] | Specifically, the work in https://github.com/ngi-nix/libresoc-soc/ | 13:43 |
| Las[m] | (check pr branch) | 13:43 |
| Guest55 | "What is that?!" | 13:53 |
| Guest55 | libre-soc on that ? | 13:54 |
| Las[m] | BTW I've already packaged Coriolis and it does work, so that's why I'm asking about the tests for Libre-SOC itself. That way we can have | 13:55 |
| Las[m] | CI. | 13:55 |
| lkcl | Las[m], ah you're back | 14:34 |
| lkcl | yeah looks perfectly reasonable | 14:34 |
| lkcl | i git a pull-push of the branch, which allowed me to do a git diff | 14:34 |
| lkcl | in future just drop nix-related and CI-related stuff directly into the master branch | 14:35 |
| lkcl | because it's unrelated to actual development | 14:35 |
| Las[m] | Yeah I was gone for a bit unfortunately. | 14:37 |
| Las[m] | So do you want to review it, or should I just push? | 14:38 |
| lkcl | done already. | 14:38 |
| lkcl | as it was (mostly) a completely separate directory (nix/*) i'm quite happy for you to add that directly | 14:39 |
| lkcl | did you update / change the submodule? src/soc/litex/florent | 2 +- | 14:39 |
| lkcl | also i liked the use of an env-var in pinouts.py | 14:40 |
| Las[m] | Sure! | 14:40 |
| * lkcl thinks... | 14:40 | |
| lkcl | that should actually be added as a default to the PSpec | 14:40 |
| Las[m] | I assume I have commit access then, thanks! | 14:41 |
| lkcl | (which is a random-config-collecting-of-options class for "stuff specified from the command-line") | 14:41 |
| lkcl | you do now | 14:41 |
| lkcl | my thoughts therefore would be that it would be good to allow the location of the JSON file to be specified via the command-line | 14:42 |
| Las[m] | I did. | 14:45 |
| Las[m] | I'm pretty sure I pushed all of my changes into upstream libresoc-litex though, so you can likely revert that submodule update. | 14:45 |
| Las[m] | litex_pinpads.json? | 14:48 |
| lkcl | can you please deal with it? | 14:51 |
| lkcl | yes. | 14:51 |
| lkcl | i have to do a video for a course today | 14:51 |
| Las[m] | Sure. | 14:57 |
| lkcl | generally submodule updates should be done as a single update. | 15:36 |
| lkcl | we learned quite quickly that if you include them in with other code-commits, git can't properly handle it because there's an exceptional non-standard code-path treating the ".gitmodules" file completely differently from standard "index" files | 15:37 |
| lkcl | (*.py, *.nix etc.) | 15:38 |
| klys | lkcl when should you be getting chips back from imec? | 15:55 |
| klys | oh I see it here 06 dec 2021, carry on: https://efabless.com/open_shuttle_program/2 | 16:07 |
| Chips4Makers[m] | klys: I expected to see the chips already but I guess they got delay due to chip squeeze. I will see somebody of imec next week Wednesday. | 16:53 |
| klys | chips4makers[m], would you happen to now the quantity being produced? | 17:07 |
| Chips4Makers[m] | 160 | 17:08 |
| klys | oh thanks. sounds like they will be moderately priced then, as 5000 EUR / 160 = 36.15 USD | 17:13 |
| Chips4Makers[m] | Where do you get the 5000 EUR from ? The cost is much more. | 17:15 |
| klys | oh, I don't know I just saw it on https://bugs.libre-soc.org/show_bug.cgi?id=589 | 17:15 |
| Chips4Makers[m] | The 5000 EUR mentioned was for possible PCB for testing and doing the test of the chip. It was not about production cost of the chip. | 17:18 |
| klys | well if it's 10M then that would yield chips at 62,500.00 ea. | 17:21 |
| Chips4Makers[m] | We used TSMC MPW (multi-project wafer) prototype service in order to test if a design works. Such a MPW has much lower setup cost than a normal product run as mask costs are shared but a much higher per unit cost. When going for volume you order a mask set for your own and then have much lower per unit costs. The latter only if you have thousands of products to sell though. | 18:00 |
| klys | okay | 18:02 |
| Chips4Makers[m] | Actual price for this run including packaging was somewhat over 150€/piece | 18:16 |
| klys | thanks | 18:16 |
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