Monday, 2022-02-28

*** alMalsamo is now known as lumberjackimok04:26
*** lumberjackimok is now known as lumberjackok04:26
ghostmansd[m]Hi folks. Long time no news.07:59
ghostmansd[m]How are you?07:59
programmerjakeWe're currently working on getting Libre-SOC to work on a FPGA for NGI POINTER's objectives. I'm supposed to get in the mail tomorrow an Orange Crab with the 85k LUT variant of the ECP5...thanks to Libre-SOC's FPGA fund, funded by generous donor(s). Thanks!08:08
ghostmansd[m]Good! Nice to hear.08:09
ghostmansd[m]I've continued a bit on binutils yesterday, not that much progress, but at least something.08:11
ghostmansd[m]Currently my chances to work are really sporadic, considering the amount of regular work and overall events in the world.08:12
ghostmansd[m]But still I hope to finish binutils task, anyway08:13
programmerjakeAlso, idk if you heard, Luke (and friends) has become the official maintainer of nmigen, granted a trademark licence to the nmigen trademark by the legal owner.08:15
programmerjake(or something like that)08:15
programmerjakethx for your work on binutils!08:17
programmerjakehopefully stuff will calm down soon, would rather not end up with WWIII08:18
programmerjakewell...ttyl, it's after midnight here08:21
ghostmansd[m]Yeah, I saw nmigen news. This is really cool.09:01
lkclghostmansd[m], nice to hear from you09:26
lkclprogrammerjake, and Toshaan Bharvani, as well, the Technical Chair of the OpenPOWER Foundation, is also the authorised co-maintainer09:26
lkclTrademark Law has similar "fall-back-defaults" to Copyright Law, in the absence of a License.09:27
lkclunder Copyright Law, if there is no License (such as BSD, GPL etc.) every single person has to follow the excruciating legal path of seeking permission to use, permission to modify, permission to display, permission to distribute etc. etc. etc. etc.09:28
lkclwhat most people are *not* aware of is that Trademark Law is *exactly the same*!09:28
lkcleven if there's a Copyrighted Open Source license with a legitimate Copyright License (GPL, BSD), if that Copyrighted work uses a Trademarked word09:30
lkclsuch as:09:30
lkcl* Debian09:30
lkcl* Redhat09:30
lkcl* Linux09:30
lkcl* git09:30
lkcl* Mozilla Firefox09:30
lkcl* Mozilla Thunderbird09:30
lkclyou *have* to seek and obtain the explicit permission to at the bare minimum "distribute" anything containing the Trademarked word if you want to operate stably and legally09:33
lkclif you don't seek and obtain that License, the Trademark Holder can issue you with a Cease and Desist notice, and once that happens they can get a Court Order to enforce it if you do not comply09:34
lkcland if they ask you to terminate all use retrospectively, you have to delete absolutely everything using that word!09:34
lkclit would utterly, utterly devastate the Libre-SOC Project to have to remove *from the entire archives and git history* all mention of "nmigen"!09:35
lkclthe crucial thing is: having received the Trademark License, the Trademark Holder *cannot* ask us to do that [retrospectively remove the word "nmigen" from all archives and git commits]09:36
lkclthe only thing they could do is: revoke the License then ask us not to use it any further. and i negotiated a 90 day period so if we really really screw up that badly, we've got 90 days to do a cleanup09:37
lkcl(a proper fork with "we can't tell you what the name is of what we are now using")09:38
lkclTrademarks have been used in the past by Free Software Projects to protect a Brand / Reputation09:45
lkcl* Mozilla enforced their Trademark against Debian, forcing them to find an alternative name: they picked iceweasel, icedove etc.09:46
lkcl* Debian enforced their Trademark against Christian Marillat, who was distributing nonfree (and often patent-infringing) versions of debian packages via http://debian-multimedia.org09:46
lkcl* Redhat *routinely* puts the hammer down on anyone distributing "free" versions of RHEL packages09:47
lkclwhich is why Centos is called "Centos", not "Redhat-free-community-maintained-version"09:48
lkclall of which was extremely disruptive for the projects involved, and *all of them were using Free Software*!09:53
lkcljust because you use - or contributed - to a Copyrighted Free Software work - does *not* grant you any permissions, overrides or authority over a Trademark09:55
ghostmansd[m]So we have a fork of nmigen which should not be called nmigen?10:00
lkclghostmansd[m], no. we *don't* have to do that, because we've a License to use nmigen from the Trademark Holder10:03
lkclif that is ever revoked, we would have 90 days in which to do such a fork10:03
lkcland we also *wouldn't* have the extremely disruptive task of doing a massive git revision rewrite10:04
lkclit would still be a pain in the ass but less of a pain in the ass10:05
lkclbtw ghostmansd[m], markos is going to do the video assembler (hooray)10:07
ghostmansd[m]Whoa, cool10:07
lkclhe'll be able to use the hacked-together-python-rewriter which turns "" into ".long NNNNN; xxx" temporarily10:07
ghostmansd[m]You did a lot while I've been out :-)10:08
lkclbut it will give you some assembler listings to actually try putting through binutils-svp6410:08
lkcldeep breath: i'm going to have to do an icarus verilog simulation of ls2 with the gram DDR3 controller13:21
lkclthere's a stand-alone simulation which i managed to get working (after fixing the Clock-Reset-Generator)13:22
lkclbut that sends direct commands over wishbone13:23
lkclicarus verilog has to be used because the Micron-provided DDR3 verilog simulation is timing-sensitive13:24
ghostmansdI again have some issues with mkpinmux when I set things up via hdl-dev-repos-virtualenv script14:11
ghostmansdAnyone familiar with this error?14:11
lkcluse an earlier version14:34
lkclback to this commit should do it14:35
lkclwe converted the test example that andrey was working on to multi-bank pinouts but haven't yet had time to go back and fix ls180 to accept the new multi-bank format14:37
lkclcommit d96f737c0a53dde983060522816bbef016b449ce14:43
lkclyep, that one14:43
lkcloo, interesting - icarus verilog, because it is entirely timing-driven, has thrown up a situation with the icache SRAMs, which are combinatorial15:27
ghostmansdlkcl: thanks, checkouting the mentioned revision helps!15:57
ghostmansdOK, yet another error upon " nosvp64":
ghostmansdit seems like each and every time I re-establish the environment the process hardly goes smoothly :-)16:11
ghostmansdperhaps I need to do it more often16:11
ghostmansdI did some changes to openpower.consts I'd like to check, so I had to launch test_issuer; I can reproduce this issue on master, though16:11
ghostmansdlkcl: gotcha! $(git show 09baeded9726414aa79cf01da5dd8b71984dd5b4)16:28
lkclghostmansd, i added a unit test to branch that might not work17:00
lkclthe immediate is out of range17:00
lkclignore it :)17:00
lkclghostmansd, ah, do a git pull on openpower-isa17:01
lkclyou're not up-to-date17:02
lkclmore to the point, sigh, i hadn't done a git push. have now;a=commitdiff;h=55dfbec9191382d2cdbb729de910c60ed1d1b74517:02
lkclsorry about that :)17:09
ghostmansdehm, that's basically just disabling it, amirite?17:31
lkclghostmansd, correct17:31
ghostmansdok then :-)17:31
ghostmansdthat's what I did17:31
ghostmansd(not this way, I simply cut some lines)17:31
lkcli needed a quick test17:32
ghostmansdstill not here though:
ghostmansdI'm launching $(python3 src/soc/fu/compunits/test/
octaviusHappy belated birthday tplaten!17:32
ghostmansdall of nmigen, nmigen-soc and nmigen-boards are updated via $(git pull  origin master --rebase)17:33
lkclghostmansd, if you can, use fu/branch/test/ instead17:35
lkclit does the same thing as but puts a Function Unit wrapper around it17:36
ghostmansdah OK17:36
ghostmansdI'm on talos1, so I guess it's possible17:37
ghostmansdwhat's the best way to check all tests?17:38
lkcli'm currently focussing on FPGAs and running via verilator and icarus verilog17:38
lkclfor now17:38
ghostmansdok, got it17:38
lkclpython3 nosvp6417:38
ghostmansdnosvp64 still?17:38
ghostmansdaha, brilliant17:38
lkclbasically the ordering is:17:38
lkcl* compunits with individual unit tests17:38
lkcl* test_pipe_callers with exactly the same unit tests but a Function Unit wrapper around the CompUnits17:39
lkcl* which is missing a fetch unit (hilariously it cheats by using the Simulator to tell it what PC and instruction to use)17:39
lkcl* test_issuer.py17:39
ghostmansdok, thanks!17:40
lkclthey go up and up and up and up, adding more functionality at each layer17:40
ghostmansdand now for something completely different17:57
ghostmansdthis time it seems XLEN is broken and is of Mock type instead of int17:58
lkclghostmansd, sigh, yep, an experiment i added yesterday17:58
lkclyep i know because it's being passed a PSpec which has not had pspec.XLEN=64 added to it17:59
lkclPSpec derives from unittest mock17:59
lkcl1 sec17:59
lkclghostmansd, should do the trick;a=commitdiff;h=efd99092d29ff546a4b48999630c277028f3af7318:00
lkclrunning now18:00
lkclyep all good18:00
ghostmansdOK thing's running now :-)18:05
ghostmansdhopefully it'll pass now18:05
lkclgoood, sorry about that. embarrassingly, you're the only other person in about 3-4 weeks to run any of the unit tests.18:05
lkclhuhn, that's a new one. icarus verilog is putting the TestIssuer exec_fsm value as "x"18:07
lkclafter running for about 100 instructions successfully18:08
lkclahh i think i know how.  uart_tx was undefined18:09
lkcland it propagated through18:09
lkclafter trying to access the wishbone bus connected to the uart.18:09
lkclthat's actually really smart18:09
lkcland annoying18:14
lkclwishbone 16550 has tx_o as "z"18:14
ghostmansd> goood, sorry about that. embarrassingly, you're the only other person in about 3-4 weeks to run any of the unit tests18:32
ghostmansdlol, glad to be useful18:32
ghostmansdnow there's bunch of assertion errors at openpower-isa/src/openpower/test/
lkcli only ran alu and that worked18:34
lkcli haven't run all of them18:34
ghostmansdand there at lines 87 and 10618:34
ghostmansdand 10018:35
lkcloh wait that's memory. which given it's running an L1 cache by default now maaay not produce the right answer18:35
lkclbtw you know you're running the HDL, here, not the ISACaller simulator, right?18:36
lkclor, you're running ISACaller-against-the-HDL-for-comparing-answers18:36
lkclhmmm a module buried inside uart16550 is being deleted for some reason by yosys passes18:45
ghostmansd> btw you know you're running the HDL, here, not the ISACaller simulator, right?18:59
ghostmansdwell I recall that there are tests which use HDL and which use ISACaller, but the fact that we now have it buried in is nice19:00
ghostmansdI guess that's a recent addition, right?19:00
lkclnope :)19:00
ghostmansdor at least I missed how it worked19:00
lkclbeen there ooo about... 18+ months? :)19:01
ghostmansdwell, given how fast things change now, 18+ months is extremely old, almost as if dating Cicero's times lol19:02
lkcli'm currently in "delivery" mode, which is very boring19:03
lkcldeliverable: FPGA19:03
lkclooo annoying19:05
lkclyosys is deleting uart_transmitter and uart_receiver from deep inside a structure19:05
lkclbecause it deems them to be "unnecessary"19:06
programmerjakehmm, do they have any externally visible outputs (if not, yosys probably is justified in deleting them)? or are they being flattened into the parent modules? try marking their outputs with the `keep` attribute19:11
lkclno flattening19:15
lkclah ha!19:15
lkclokaay that seems to have done it19:20
lkcllet's try that as a setattr command19:23
programmerjakefor stuff I should be working on, should I try and add XLEN=32 tests? currently XLEN=32 is entirely untested against the simulator, I know for a fact there are some discrepancies19:24
lkclprogrammerjake, at some point yes,19:24
lkclbut with XLEN=16 and 8 as well19:24
lkclit's a damn big job19:25
lkclwhere ISACaller needs to be done first, realistically19:25
lkclotherwise how the heck are we going to know the answers are correct?19:25
programmerjakeXLEN=16/8 has the major problem that load/store addresses aren't really sufficient so that will need extra work19:26
lkclyes you saw the message i wrote this morning about that19:26
programmerjakeyeah, i don't necessarily like that solution sounds like a mess19:27
lkclalternatives are even worse. "special registers"19:27
lkclspecial LD/ST registers19:27
lkclit starts to massively deviate from the Power ISA and ultimately cost a fortune in compiler modifications19:28
programmerjakeimho XLEN=16 should just have 16-bit addresses and just limit it to microcontrollers, XLEN=8 shouldn't be a whole cpu, there's just not enough address bits and I think we should limit its use to sv width overrides19:29
lkclthat's not useful in the context of running general-purpose programs.19:29
programmerjakewhere with sv the addresses are still 64/32/16-bit (depending on whole-cpu XLEN)19:30
lkcland if you look at 8-bit microcontrollers they are in no way limited to only addressing 256 bytes of RAM19:30
lkclALU width != Memory width19:30
programmerjakewhich part isn't useful?19:30
lkclforcing ALU width === Memory width is not in the least bit useful19:31
lkclexpecting a 4096-core AI chip to only be possible to address 256 bytes of memory will be laughed at19:32
lkclthere do exist such processors - a scalar one that costs below $0.10 is the STM800319:33
lkclbut even that has "advanced" (higher cost) versions that can address 512 bytes19:33
programmerjakei strongly disagree...keeping max alu width == memory address width retains the simplicity of the instruction set. expecting a 4096 core AI chip to only have 8-bit arithmetic is also a joke, you need fast address calculations, so at least 32-bit arithmetic19:33
lkclprogrammerjake, you're again waving different criteria around and moving the goalposts again. it's a very annoying habit19:35
programmerjakewell...i'm pointing out the inherent flaws in your goalposts and suggesting imho more useful goals19:35
programmerjakeif you have sv-based carry chains that *is* larger arithmetic, so setting XLEN to a tiny value just makes the ISA more complex for no real benefit. you can always have a 32/64-bit cpu that processes most arithmetic 8-bits at a time19:38
lkcli'm currently focussed on delivery, for the contracts. i can spare a *small* amount of time to discuss other things19:39
lkclhowever i cannot spare the time if it becomes a major distraction19:39
programmerjakeimho the main usecase for tiny XLEN is tiny microcontrollers, not AI. AI would use XLEN=32 and let sv width override to 8 for AI arith19:39
lkcli have to focus, and you should be as well19:39
lkclahh good, those attributes did the trick19:41 put off XLEN=32 tests for later? or work on that rn?19:41
lkclthank you19:41
lkclit was an experiment to see if there was a way to reduce FPGA resources19:41
lkclto help the OpenPOWER Foundation Members (particularly LibreBMC) out of a bind19:42
lkclto tie in with IBM's interest - and the IBM India Education Groups's interest - in AI19:42
programmerjakeah...i thought it was cuz you were having issues with the ecp5 85k19:43
programmerjakeand AI19:43
lkcli tied it in with a whole stack of other things in order to help justify external interest, strategically19:43
programmerjakein any case, should I work on that now? or something else?19:44
lkclno, skip it for now19:44
lkclit needs the simulator, ISACaller, to support XLEN, first19:44
programmerjakethat seems relatively easy to add...just add an external parameter for now19:45
programmerjakesupport sv later19:45
lkclit's not: the register file is specifically designed around 64-bit SelectableInts19:46
lkclexxcellent, i'm getting DDR3-simulated-traces in icarus verilog19:47
lkclby comparing the reactions to the "vanilla" (wishbone-driven-without-a-CPU) version i can see what the hell's going on19:48
programmerjakewell, what should I work on next? i'll be getting the fpga sometime tonight19:53
* lkcl thinks thinks19:53
lkclah brilliant19:53
lkclprobably pick another bitmanip instruction?19:53
lkcli tried reaching out to the nym folk after one of them responded well at an NGI meeting19:54
lkclbut haven't heard from them since19:54
lkclMirko's tried to re-introduce us to get some engagement, still no reply19:55
programmerjakei was thinking of the AES S-BOX instructions...though modular inverse could be *extremely* slow (why AES uses a look-up table)19:55
lkclwhich is weird, because we need algorithms to test hardware on, and they expressed an interest in having hardware that they could test algorithms19:56
programmerjakeor, i could look through whatever else we'd want for sha3 to be fast19:56
programmerjakesha3 has no s-box, it's just bitmanip19:56
lkclcan you raise a bugreport about it, and find a *really* simple reference implementation? (don't write one)19:57
programmerjakewhich one?19:57
lkclthere should be one in or associated with the academic papers on it19:58
programmerjakeah, ok19:58
lkclone of the really really irritatingly-annoying things about what we're doing is that we actually want "totally-suboptimal-like-totally-unuseable-for-everybody-else scalar algorithms"19:59
lkcli think it took me like 3 weeks and looking at dozens of papers to find a "human readable" version of DCT20:00
lkcl(i eventually found project nayuki)20:00
lkclbut even there had to spend 2 weeks adapting it from recursive to iterative20:00
lkcleveryone else goes, "oh that scalar algorithm is totally s*** you REALY want to like use these totally fast SIMD instructions and do loop unrolling and s***"20:01
* lkcl bangs head against the desk20:01
lkclthe most awe-inspiringly-scary one i came across was a compiler that blatted out fully-loop-unrolled SIMD assembler for large FFTs20:05
lkclmy personal favourite one, jacob, is to do NTT (Number Theory Transform)20:06
lkclwhich is basically Discrete Fourier Transform with Galois Field arithmetic20:06
lkclthat's the core basis of highly optimal algorithms for Reed Solomon20:07
* lkcl going to let icarus run for another half hour20:08
lkclit's horrendously slow but hey20:08
programmerjakefound the de-facto standard Rust implementation of SHA3's sponge function (the main core of SHA3)20:10
programmerjakeit's pretty readable imho20:11
programmerjakeafaict ternlog is the only instruction we needed that would speed up sha3 without being, mission accomplished?20:16
lkclprogrammerjake, that's frickin hilarious :)20:21
lkclah - and an implementation without external modules.20:22
lkclthat's another pain-in-the-ass thing about implementations20:22
lkclthey're not standalone20:22
lkclacademic papers and cryptographic authors know to not #include anything at all20:23
lkcl(sole exception stdio.h)20:23
lkcl"mod unroll"20:23
lkclcan you find a c reference implementation?20:24
lkcloh btw, also, can you adapt comment 0 on the cryptoprimitives Schedule A to put the full URL of the bugreports in it?20:24
lkcllike in #17520:24
lkclthen email the text cut/paste to Michiel?20:25
lkclyes exactly: it's a module.20:25
lkclthis is a "No" as a Reference Implementation20:25
lkclthe reason i asked if you can find a c implementation is because it can be converted to assembler with "gcc -S" and then used as the basis to do a svp64 version20:26
* lkcl thinking out loud here20:26
programmerjakeyou can easily do that with rust too...20:26
* lkcl also has to check sausages20:26
programmerjakea rust module is much closer to a C++ namespace than a C source rust everything in a crate (a collection of modules) is compiled together as the equivalent of 1 c source file20:28
programmerjakei can get rustc to spit out an inlined version, where everything is in 1 file20:28
lkclno, please. no rust.20:28
lkclthat makes an entire rust compiler an extra dependency for the openpower-isa repo where the media assembler lives20:29
lkclwe've talked about this multiple times20:29
programmerjakewe can check in the .s file if you like? it would need to be manually edited to add in ternlog instructions anyway20:30
lkcllook at how the media directory is set up in the openpower-isa rep20:30
programmerjakeso, imho no matter which way we go, we'd want the .s checked in cuz ternlog isn't in any compilers yet20:31
lkcllook at how the media subdirectory is set up.20:31
lkclyou will find two versions.20:31
lkcl1) the original scalar ppc64 version20:32
lkcl2) an svp64 version20:32
lkclthis is where some c-based reference designs can be found20:33
lkclthe tiny one looks like a good candidate20:33
lkclthat's pretty blindingly obvious20:34
programmerjakeexactly as obvious as the rust implementation...20:37
programmerjakealso they have the sorta equivalent of rust modules: #include "sha3.h"20:38
programmerjakealso the RustCrypto repos are audited for correctness iirc, the tiny_sha3 repo seems less likely to be audited20:41
programmerjake> oh btw, also, can you adapt comment 0 on the cryptoprimitives Schedule A to put the full URL of the bugreports in it?21:08
programmerjakei thought i already did that...21:09
programmerjake right?21:09
programmerjakeso i just need to email the contents of comment #0 to michiel? or can I just email him the link?21:10
programmerjakelkcl ^21:11
programmerjakebtw toshywoshy, openpowerbot disconnected from oftc21:18
lkclprogrammerjake, brilliant, yes - do email Michiel.21:49
programmerjakesent. (as you probably can see, i cc-ed you)22:05
lkclghostmansd, very funny on the python enums :)22:11
ghostmansdwell, I've spent a day and a half trying to make metaclass work with inheritance from enum.EnumMeta22:12
lkclooo noiiice22:12
ghostmansdand in the end I'm really pissed with the rationale that they don't allow inheritance22:13
lkclehn?? que??22:13
ghostmansdunless you inherit from really basic stuff, like enum.Enum22:13
ghostmansdi.e. you're basically allowed to inherit it _once_22:13
ghostmansdwell, I _made_ it work22:13
ghostmansd...only to find that it breaks in Python 3.922:14
lkcl20 years working with python and i don't frickin understand a single one of these
ghostmansda day and a half to realize that it's easier to re-create enum from scratch than really inherit existing22:14
ghostmansdI mean, what the fuck? We had bunch of enums in power_enums, I also converted a bit of code in openpower.consts22:15
ghostmansdwhat'd be simpler than inheriting those, right?22:15
lkcluh-huhn. makes sense to me22:15
ghostmansdbut the crap simply doesn't work; what's worse, it doesn't work differently across different python versions22:16
lkclfeel free to do exactly that btw22:16
ghostmansdreally, really pissed22:16
ghostmansdany hack I tried so far is doomed22:16
ghostmansdso I iterate over Enum.__members__ since it's documented, and re-create enum with all its values22:17
ghostmansdI haven't pushed it yet; waiting for test_issuer to complete22:17
ghostmansdbinutils part is pushed, though22:17
ghostmansdas for test_issuer, I have many failures; I want to ensure I have these on master as well22:18
lkclno if you think it's worth replacing Enum then absolutely go for it22:18
ghostmansdyep, because this allows to deal with consts.XXX exactly like we deal with power_enums.YYY22:18
ghostmansdI found that we have some code in svp64.py22:18
ghostmansdlike (bc_vlset << SVP64MODE.MOD2_LSB)22:19
ghostmansdand so on22:19
ghostmansdand, well, I also have do this stuff in binutils :-)22:19
ghostmansdI still haven't looked into new mnemonics22:20
ghostmansdi.e. bc_brc and bc_vli are not present in svp64.py22:21
ghostmansdbc_svstep is there, but it's always zero22:21
ghostmansdthat's what I mean:
ghostmansdanyway. it's 1:22 AM here22:22
ghostmansdso enough for today :-)22:22
ghostmansdOK it seems the failures are the same on master22:32
ghostmansdI'm pushing the changes22:32
ghostmansdDone; please let me know if this breaks anything. It shouldn't (the change I'm worried is Enum migration, which should be harmless), but I cannot say for sure, since I see about 100 tests failing in test_issuer and is unable to check whether some fail differently with my patch.22:35
lkclghostmansd, star. yeah will take a look soon, trying to focus on FPGAs23:36

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