lkcl | markos: sorry it's been a while since i used setvl, been focussing on implementing scalar ops. | 07:12 |
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lkcl | https://libre-soc.org/openpower/sv/setvl/ | 07:12 |
lkcl | this is supposed to be up-to-date sigh | 07:12 |
lkcl | this is the better guide because it is actual executable pseudo-code | 07:13 |
lkcl | https://libre-soc.org/openpower/isa/simplev/ | 07:13 |
lkcl | sooo.... you want - if this is the format - setvl. RT,RA,SVi,vf,vs,ms | 07:15 |
lkcl | SVi=17 | 07:15 |
lkcl | vf vertical-first=0 | 07:15 |
lkcl | vs VL set = 1 | 07:15 |
lkcl | ms Max VL set = 1 | 07:16 |
lkcl | you also because it is an immediate-form don't want to know what VL is (you already know it is to be set to 17) therefore RT can be set to zero | 07:20 |
lkcl | and because you are setting an immediate you must request that by setting RA=0 | 07:20 |
lkcl | therefore it will be | 07:20 |
programmerjake | and use setvl rather than setvl. i'd guess | 07:20 |
lkcl | setvl 0,0,17,0,1,1 | 07:21 |
lkcl | yes | 07:21 |
lkcl | we will need pseudo-ops for these in binutils because that's a hell of a lot of options | 07:21 |
programmerjake | i'll work on tree reduce stuff tomorrow (i guess it's today for most of you) | 07:22 |
lkcl | heh yes | 07:23 |
lkcl | what am i doing up at UTC 7:23?? :) | 07:23 |
lkcl | what are _you_ doing up at 2:23am? :) | 07:24 |
programmerjake | it's 0:24 am here | 07:24 |
lkcl | ah you're... ermermerm... US-Central? | 07:29 |
programmerjake | pacific daylight time | 07:33 |
tplaten | When I run make microwatt_external_core I get a TypeError: Object (rec <unnamed> st_data_i st_data_i_ok) cannot be used as a key in value collections | 16:00 |
tplaten | and when I use an older version of external_core_top.v, I can't build microwatt with EXTERNAL_CORE=true it fails with | 16:04 |
tplaten | external_core_top.v:258195: ERROR: Re-definition of module `\plru_2'! | 16:04 |
tplaten | external_core_top.v seems to be working in the verilator_trace branch | 16:05 |
lkcl | tplaten, you need to be fully up-to-date with all git repositories | 17:11 |
lkcl | soc - commit 5e392ebd3ba9f1568080abe3cde0f38e71e8fb51 | 17:12 |
lkcl | and using the gitlab nmigen repositories | 17:13 |
lkcl | which you should *ONLY* install with "python3 setup.py develop --no-deps" one at a time | 17:13 |
lkcl | that's assuming you've already got the dependencies installed | 17:13 |
lkcl | (importlib_metadata being one of them, for nmigen-boards, for example) | 17:14 |
lkcl | also you may have a version of yosys that is either too old or too new | 17:16 |
lkcl | try 0.13 | 17:16 |
lkcl | $ yosys --version | 17:16 |
lkcl | Yosys 0.13 (git sha1 8b1eafc3a, clang 9.0.1-12 -fPIC -Os) | 17:16 |
tplaten | it works | 17:33 |
lkcl | briilliant! | 17:33 |
lkcl | what was it? | 17:33 |
lkcl | updating repos, or updating to yosys 0.13? | 17:34 |
tplaten | I had the wrong version of nmigen, the one from git.libre-soc.org. The yosys version is correct | 17:36 |
lkcl | i must update that but it is quite a bit of work | 17:36 |
tplaten | Now when I try to use external_core_top.v in my branch of microwatt (that one that includes jacob's 3d game), I get a external_core_top.v:262095: ERROR: Re-definition of module `\plru_2'! | 17:43 |
lkcl | search for that. | 17:44 |
lkcl | module plru_2(acc_en); | 17:44 |
lkcl | you should also have | 17:45 |
lkcl | module \plru_2$175 (acc_en); | 17:45 |
lkcl | and | 17:45 |
lkcl | module \plru_2$182 (acc_en); | 17:45 |
lkcl | or similar | 17:45 |
tplaten | I did a grep: | 17:49 |
tplaten | external_core_top.v:module plru_2(acc_en); | 17:49 |
tplaten | external_core_top.v:module \plru_2$175 (acc_en); | 17:49 |
tplaten | external_core_top.v:module \plru_2$182 (acc_en); | 17:49 |
tplaten | and none in microwatt | 17:49 |
lkcl | ok then chances are high that you've included the external_core_top.v twice. | 17:51 |
lkcl | use make's "-n" option and look through the commands it intends to run | 17:52 |
tplaten | No, its only included once, so I must have included parts of microwatt that conflict with libre-soc | 17:58 |
tplaten | I think it is litedram_wrapper, but I'm not sure. I know that litedram works with microwatt on orangecrab, since I can boot linux | 18:14 |
tplaten | I also saw that litedram-wrapper-l2.vhdl drives the leds on the orangecrab, in my case the led is white | 18:29 |
tplaten | I now get yosys running after commenting out some lines in fpga/top-orangecrab0.2.vhdl | 19:03 |
Veera | Hi | 20:09 |
lkcl | hi Veera | 20:16 |
*** henriok_ is now known as henriok | 20:16 | |
Veera | lkcl: regarding bug: 750 can you give feedback. In io_tristate_jtag have put ??. Can you suggest what to put? | 20:21 |
lkcl | Veera, let me take a look. | 20:21 |
lkcl | good to see you around again | 20:21 |
lkcl | i can't see anything at the moment with the transparency, doh :) | 20:23 |
lkcl | Veera: it's just "crossed out" | 20:24 |
lkcl | "T" followed by a mis-spelled letter... crossed out | 20:24 |
lkcl | so you can remove the ?? entirely | 20:26 |
octavius | lkcl, made an iwiki page for orangecrab: https://libre-soc.org/HDL_workflow/orangecrab/ | 21:06 |
octavius | I'll update it as I go along | 21:06 |
Veera[m] | lkcl: i logged in with matrix | 21:08 |
Veera[m] | I may have missed msg's. Anything important you want to mind me! | 21:09 |
programmerjake | afaict nothing was posted since you logged out on irc | 21:21 |
programmerjake | ahh, apparently octavius's messages didn't make their way to matrix | 21:23 |
Veera[m] | programmerjake: ta | 21:24 |
programmerjake | i can see octavius's messages now, they were just delayed a few minutes | 21:25 |
lkcl | unnbelievable, i got the ulx3s to stabilise by running a power-on-reset counter for 2^23 cycles | 22:17 |
lkcl | about frickin time | 22:17 |
octavius | lkcl, are there any bugs and budget for orangecrab documentation/code? | 22:38 |
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