Veera[m] | bug: 750 converted and uploaded all 4 images to svg format. Kindly give review. | 11:04 |
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lkcl | Veera[m], brilliant, 1 sec | 11:07 |
Veera[m] | lkcl: In io_tristate_jtag.svg 2nd picture from bottom I have put ?? Tristate title. What should be ?? | 11:17 |
lkcl | Veera[m], i already replied to that. remove the "??" | 11:23 |
lkcl | https://bugs.libre-soc.org/show_bug.cgi?id=750#c8 | 11:24 |
Veera[m] | Ok. | 11:24 |
Veera[m] | Is this bug still applicable for payment, or timeline has been missed. | 11:25 |
lkcl | ha, the jtag block image looks really good | 11:25 |
lkcl | deadline is Oct 1st 2022 | 11:25 |
lkcl | ah you did the tristate one too, with the 4 IN/OUT ABCD, that's brilliant. looks good too | 11:29 |
Veera[m] | Will this bug be submitted for payment after corrections and upload to page. I have need for some money. | 11:46 |
Veera[m] | Is there any other short paid work which can be combined with this. | 11:47 |
lkcl | yes of course you can submit it for payment. i increased to EUR 500 for you | 11:49 |
lkcl | we do need nextpnr-xilinx to have a devscript | 11:50 |
lkcl | and another one for: dfutil, openFPGALoader, ujprog and fujprog https://github.com/emard/ulx3s/blob/master/doc/MANUAL.md | 11:52 |
lkcl | can you raise 2 bugreports about those | 11:52 |
lkcl | one for nextpnr-xilinx, the other for the FPGA tools. | 11:53 |
lkcl | i can put some budget in for you under https://bugs.libre-soc.org/show_bug.cgi?id=22 | 11:54 |
lkcl | but we have to be careful as the limit of EUR 50,000 is approaching | 11:54 |
Veera[m] | nextpnr-xilinx to support xc7? | 12:12 |
Veera[m] | dfutil: Device Firmware Upgrade Utilities? | 12:13 |
lkcl | Veera[m], yes | 12:33 |
lkcl | turns out nextpnr-xilinx is much faster than symbiflow. like, 5x faster | 12:34 |
Veera[m] | Yep read in ml you sent about that 5x faster; routing wastage in symbiflow. | 12:42 |
Veera[m] | In a short while I will open two bug reports for them. | 12:42 |
lkcl | star | 12:43 |
Veera[m] | lkcl: bug 790, 791 created for the above mentioned things. You may put the needed budget for them. | 13:39 |
lkcl | Veera[m], excellent. 790 done already | 13:52 |
lkcl | 791 as well | 14:14 |
Veera[m] | yep. saw. ok. thanks | 14:15 |
Veera[m] | I will start work on them. | 14:15 |
lkcl | brilliant. the dfutil ones should be dead easy and straightforward | 14:16 |
Veera[m] | nextpnr-xilinx supports xc7a35tcsg324. But we are targeting Arty7-100T. From what I learnt with symbiflow, to make it work, it may be just some device changes to attosoc.sh and its precursors command. Have you found out? | 14:29 |
lkcl | i had to copy some files, xc7a100t is supported | 14:36 |
Veera[m] | that is good. I will find and work out. | 14:40 |
lkcl | oleee! HyperRAM is working! | 16:51 |
lkcl | about frickin time | 16:51 |
tplaten | I'have been able to get microwatt-verilator to compile tplaten_3d_game after uncommenting a few lines | 18:19 |
lkcl | tplaten, hooray | 18:23 |
tplaten | So maybe in the next few days I might get linux to boot in the backport using verilator. After this I try using the orangecrab. | 18:24 |
lkcl | tplaten, you may have better luck than i did with that, after i discovered we had missed out propagating "nc" through LDST into dcache. | 18:25 |
lkcl | doh :) | 18:25 |
lkcl | so there was for example some polling of the UART | 18:25 |
lkcl | which of course it goes "oh i read this cached value already, let me give you that" | 18:25 |
lkcl | *face-palm* | 18:25 |
lkcl | i fixed that... mmm... last month? | 18:26 |
lkcl | but haven't run microwatt-verilator with the microwatt linux-5.7 initrd since then | 18:26 |
tplaten | I ran verilator once, but not using the libre-soc core and not using linux either. | 18:30 |
lkcl | it's horribly slow, only 5000 instructions per second, but that's enough to run helloworld.bin in about... 90 seconds, and micropython.bin in around the same | 18:39 |
lkcl | 1-2 UART characters per second, approximately | 18:39 |
tplaten | I know, even the microwatt core is slow, but libre-soc is much slower | 18:58 |
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