Saturday, 2022-04-30

lkclwell, what we are doing is borrowing bits from EXT01.14:09
lkclEXT01 is the major opcode for Power ISA v3.1 "64-bit prefixing"14:09
lkclin theeooorrryy there should be some patches to binutils to add 64-bit prefixing support already14:09
lkcli don't know how they decided to do it14:09
tplatenI now continue on the orangecrab port of ls214:10
lkcltplaten, cool14:10
tplatenI assume that on an FPGA it boots from an SPI flash, which I will need to define first14:13
lkclah no.14:13
tplatenblock ram used as rom, not sure14:13
lkcla program is uploaded over DFI-UTIL which happens to contain a ROM-based (BRAM-based) version of coldboot.bin14:14
lkclwhere coldboot.bin has been compiled to look, in *software*, for the SPI flash peripheral14:14
lkclyes BRAM is used effectively as a ROM.14:15
tplatenI now have a look at coldboot.c, but assume that one can use hello_world for a first test instead14:21
tplatenbecause currently on the orangecrab I get14:22
tplatenddr pins None14:22
tplatenspiflash pins None14:22
lkclit's a good idea.14:25
lkclhello_world.bin only needs BRAM and uart.14:26
lkclfrom the verilator working you shouuuld be set up with the right start address14:27
tplatenI added  SRAM (read-writeable BRAM) at 0x8000_0000 and still don't get any output from the hello world program. Something I must have forgotten.15:43
tplatenAt least the Blinky module is working on ls2 on orangecrab.15:50
tplatenI compiled external_core_top.v with a matching --pc_reset and set BOOT_INIT_BASE to the correct address, still I do not get any UART output.15:58
tplatenI saw that ulx3s is using 40mhz, it now works.18:05
tplatenI get a "■ libre-soc, it works" output, now commiting the changes18:42
tplatenTomorrow, I'll try to get SPI flash working18:52

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