Sunday, 2022-05-01

lkclooo still trying to track down what the heck is going on with timer_interrupt()11:58
lkclthere's a permanent loop going on where timer fires timer fires timer fires timer11:59
programmerjakemaybe the timer is counting too fast or the timer interrupt isn't properly acknowledged or something?12:06
lkclthe clock frequency is only 25 mhz: really low12:14
lkclthat's what will work. how that influences the number of occurrences of the timer is what i'm investigating12:15
programmerjakewell...if the timer is counting fast enough that it can trigger another interrupt before the first one's too fast even if it counts at 32khz. maybe set linux's tick rate to be >1ms? iirc it defaults to 1ms12:24
lkcli'm adding +    select GENERIC_CLOCKEVENTS_MIN_ADJUST12:28
lkcl to see if that helps12:28
lkclCLOCKEVENTS is currently allowed (for powerpc) to be extremely fast12:29
lkcltplaten, read the comments in the source code regarding QSPI13:45
lkclalso note that the VERSA_ECP5 specifically requires the ECP5 to drive the clock line (USRMCLK)13:47
tplatenI had a short look at, that part13:51
tplatenAfter I found out about rcs_arctic_tern_bmc_card, I did a look at
tplatenYes, I saw that SPIFlashResources is different, it has cs_n="U17", clk="U16", miso="T18", mosi="U18", wp_n="R18", hold_n="N18", there is no dq0 to dq3.14:30
lkcltplaten, correct.16:22
lkclwhat about this comment16:23
lkcl        # Override here to get FlashResource out of the way and enable Tercel16:23
lkcl        # direct access to the SPI flash.16:23
lkcl        # each pin needs a separate direction control16:23
tplatenI had a look at that, looks good.16:41
tplatenI came with a similar thaught, but I get a16:42
tplatenAttributeError: Record 'spi_0_0__dq0' does not have a field 'o_clk'. Did you mean one of: i, o, oe?16:42
tplatenmost likely some repositories have to upgraded16:42
lkcltplaten, you need to copy the section in versa_ecp5 exactly17:41
lkclthen make absolutely certain that you set the spi0_is_lattice_ecp5_clk = True flag17:42
lkclif you do not set xdr on the platform request it will *not* create the required o_clk field17:42
lkclthere's a chain of things that you have to get right, otherwise it goes to hell17:43
tplatenthe first thing I knew about: spi0_is_lattice_ecp5_clk is set to True when using the orangecrab.17:59
tplatenYes, I forgot to set xdr in my code18:04
lkclxdr set up phase-offset capability.18:18
lkclbut also it allows an IOpad to be specifically driven by a clock18:19
lkclin the case of the SPI pads, that *has* to be USRMCLK18:19
lkclit's a strange quirk of the ECP5, i have no clue why they did it that way.18:19
tplatenI know about USRMCLK, i'll do a deeper look at tomorrow.18:22
tplatenWhen not working on libre-soc, sometimes I compose songs for which I use a synthesizer singer written in python and c++18:26
lkclwow cool!18:32
lkclis it available libre-licensed somewhere?18:32
lkcli always wanted to do that18:32
tplatenOf course, it is libre. GNU AGPL for the engine core, no copyleft for some other components.18:33
lkclprogrammerjake was mentioning on tuesday that he did a PWM attiny85 synthesiser18:34
lkcllove to hear it and see how you did it18:34
lkcli've looked occasionally for synthesiser python code for a while18:35
tplatenI also had a look at
tplatenthere are many UTAU clones and plugins written in python, not all are libre, some lack a license. I wrote my own frontend with an XML to UST converter in pure python18:37
lkclholy cow, that's synthesised voice??18:37
tplatenI combined Sinsy with MBROLA18:37
tplatenSome time ago, I will use
lkclwow. just wow, that's astounding quality18:37
tplatenI think I could train a model with some poems from and a melody I will write.18:39
lkcli've a larger set online as well18:40
tplatenMy fork of Sinsy has support for the English language, the original version only supports Japanese18:40
tplatenThe I will sing those poems and record my singing18:41
lkcla lot of them have a rhythm suitable for singing18:43
ghostmansdGood news, `sv.extsw 5.v, 3.v' already produces two insns in binutils :-)18:43
lkclghostmansd, good grief18:43
ghostmansdin fact, we're almost here: we have (00004005 b407657c) instead of (002f4005 b407017c) from $(sv.extsw 5.v, 3.v)18:44
ghostmansdbut I haven't addressed rm assignment yet, and haven't yet completed the whole remap of insn18:45
ghostmansdso, some bits are different, still you can see the pattern :-)18:45
lkclthat looks like the register numbering isn't correct yet18:46
lkcltplaten, this dance tune is from the 1200s's_Mediaeval_Dance.mscz18:49
lkclimagine a monk going through a village, hears a dance tune that he's never heard before, writes it down18:50
lkclbut there was no tempo or time-signatures back then because all written music was more an "aide-memoire"18:50
lkcli made a best-guess as to what the timing is and it turns out to be a 3-harmony round18:51

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