lkcl | melted-brain :) | 09:47 |
---|---|---|
lkcl | no there isn't | 09:47 |
lkcl | it's a csv file | 09:47 |
programmerjake | imho it would be useful to switch to json5 format, rather than csv | 10:00 |
programmerjake | https://packages.debian.org/source/bullseye/python-json5 | 10:00 |
programmerjake | json5 is json with comments and a few other things to make it easier for humans to use | 10:01 |
programmerjake | or we could use toml | 10:01 |
programmerjake | json and toml both are widely supported | 10:02 |
programmerjake | https://github.com/toml-lang/toml/wiki#implementations | 10:03 |
programmerjake | by contrast with yaml -- yet another maximal language (not really what yaml means, but i find it amusing) | 10:05 |
lkcl | programmerjake, yyeah, apart from anything it would solve the issue of line-wrap | 10:29 |
lkcl | but then again also make it slighly harder to extract / compare against microwatt | 10:30 |
programmerjake | jq to the rescue!! | 10:30 |
lkcl | and, drat, introduce massive extraneous crap due to repetition of the key-value pairs | 10:30 |
lkcl | unless the rows stayed as lists | 10:31 |
programmerjake | that can be done... | 10:31 |
* lkcl trying to recall what went into the parser, it's not just plain "read the csv" | 10:31 | |
* lkcl not feeling it to be a high-priority item, more along the lines of "if it ain't broke don't fix it" | 10:32 | |
programmerjake | yeah, though imho it would be useful to at least have comments in your csv...just check if the first col starts with `#`, if so, ignore the whole row. simple | 10:33 |
lkcl | and with 15 weeks to the october deadline (12 if excluding "NLnet putting in last minute EU Grant transfer requests") i'm inclined to suggest leaving anything that takes a long time | 10:34 |
lkcl | yyeah that might work, 1 sec let me see... | 10:34 |
programmerjake | imho switching to json would take <1 day, probably 1-2hr | 10:34 |
lkcl | https://stackoverflow.com/questions/14158868/python-skip-comment-lines-marked-with-in-csv-dictreader | 10:34 |
lkcl | pffh | 10:34 |
lkcl | programmerjake, no it damn well would not | 10:34 |
lkcl | that's a 1-line addition, and get_csv is a single function, i know (appx) where it is | 10:35 |
programmerjake | why not? doesn't everything that reads those csvs go through the decoder classes? we could switch it there and it would be pretty simple to do. | 10:36 |
programmerjake | note we don't want pure json -- no comments | 10:36 |
lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=86f0c748efb10c84e014583cc400dee29564f7a7 | 10:40 |
lkcl | that's brain-dead-easy. | 10:40 |
programmerjake | imho it'd be useful to support blank lines and comments with spaces before the # | 10:41 |
programmerjake | with that code a blank line will cause row[0] to raise an error | 10:41 |
lkcl | that's good: that will stop people putting in blank lines and comments with spaces before the # | 10:42 |
lkcl | it's enough | 10:42 |
programmerjake | k | 10:42 |
programmerjake | now we have comments -- add license info to the csvs! | 10:43 |
lkcl | too much else to do, and it means octavius (and anyone else) can at least comment out in-development... | 10:43 |
lkcl | oh yeah :) | 10:43 |
programmerjake | :) | 10:43 |
lkcl | which... has to be CC-4 because it was taken directly from IBM-licensed microwatt source code | 10:44 |
lkcl | although there's a case for there not *being* a license because it's "specification"... | 10:44 |
programmerjake | at least we could add attribution, even if it isn't a copyright license | 10:45 |
programmerjake | also, a lot of that is derived from the openpower spec, not just microwatt | 10:46 |
programmerjake | iirc | 10:46 |
programmerjake | in any case, gn | 10:46 |
lkcl | night :) | 10:47 |
lkcl | moornin octavius. i noticed you melted your brain? | 13:26 |
lkcl | whilst i have been doing totally-messed-up work patterns for 30 years it has... consequences i cannot recommend :) | 13:26 |
lkcl | i added a 1-line fix so you can do "# comment" in csv files btw | 13:26 |
lkcl | i'd already done the pseudo-code for bmask because it's a little quirky | 13:27 |
lkcl | https://libre-soc.org/openpower/sv/vector_ops/discussion/ | 13:27 |
lkcl | such as, "if RB is zero then don't load it from the regfile, use the mask value of all 1s" | 13:27 |
lkcl | if _RB = 0 then mask <- [1] * XLEN else mask = (RB) | 13:27 |
lkcl | and the other thing to remember is, objects in the pseudocode are SelectableInt()s | 13:28 |
lkcl | and consequently have an indexing operator | 13:28 |
lkcl | mask[0:1] gets you bits 0..1 | 13:28 |
lkcl | that's *NOT* the same as python range! | 13:29 |
octavius | Hi lkcl, thanks! | 13:31 |
lkcl | you shouuuld be able to just throw that into av.mdwn but i haven't syntax-checked it. | 13:38 |
octavius | Putting into av.mdwn I get an IndexError: pop from empty list when running PyWriter | 15:03 |
lkcl | octavius, that's a pain. use binary-search to cut out lines until it passes | 15:28 |
lkcl | then put back half of them, etc. | 15:29 |
lkcl | narrow it down to one line | 15:29 |
lkcl | octavius, if you get really stuck, chuck it in a branch and i'll take a look | 15:43 |
octavius | Looks like it's not the pseudo code | 15:49 |
octavius | would not having a definition in svp64.py cause this? I currently have the b-form part commented out | 15:49 |
ghostmansd | the most exhaustive documentation ever: https://libre-soc.org/openpower/sv/svstep/ | 15:54 |
ghostmansd | :-) | 15:54 |
ghostmansd | ahem... should I add this link to commit? | 15:54 |
ghostmansd | https://libre-soc.org/openpower/isa/simplev/ I'll add this | 15:55 |
octavius | lkcl, I added the bmask op (but PyWriter is not working, and the bitfields in svp64.py are probably wrong) | 15:56 |
lkcl | ghostmansd, i know :) | 17:05 |
lkcl | octavius, you missed "Special Registers Altered" None | 17:06 |
octavius | XD | 17:11 |
lkcl | hmmm what the heck's going on... BM2-Form not recognised... hmm... | 17:13 |
octavius | yeah | 17:13 |
lkcl | ah ha. power_enums.py | 17:13 |
lkcl | ok all good | 17:13 |
lkcl | that was more hassle than it should have been | 17:14 |
lkcl | ghostmansd, ahhh... actually.... svstep is ahhh not supposed to be added | 17:18 |
lkcl | https://libre-soc.org/openpower/isa/simplev/ | 17:18 |
ghostmansd | eeeeh... how comes? | 17:19 |
lkcl | notice the pseudocode? | 17:19 |
lkcl | for setvl? | 17:19 |
ghostmansd | yep, why can't it be svstep insn? | 17:19 |
lkcl | it's a waste of encoding space | 17:20 |
lkcl | setvl with vf=1, ms=0, vs=0 does the exact same job | 17:20 |
ghostmansd | OK, let's approach from another angle. It's present in parts of doc, it's present in svp64, it's present even in task I've been doing for quite a long time (and in fact still do, rebasing). | 17:20 |
lkcl | i know | 17:20 |
ghostmansd | sigh | 17:21 |
ghostmansd | This patchset really experiences my patience... :-) | 17:21 |
lkcl | uh-huhn... | 17:21 |
ghostmansd | OK I'll drop it. | 17:21 |
lkcl | i wondered why the hell i hadn't documented the page | 17:22 |
lkcl | welcome to developing a spec at the same time as implementing it | 17:22 |
lkcl | i thought i'd got all these things sorted out before saying "ok go" on binutils, sorry | 17:23 |
ghostmansd | huh :-) | 17:23 |
ghostmansd | OK don't worry, that's OK | 17:23 |
ghostmansd | at least it's good we found it now, before it's in upstream | 17:23 |
ghostmansd | the latter would also not be an extreme issue, though | 17:23 |
ghostmansd | but still is better to find it now | 17:24 |
ghostmansd | kinda pissed that I just implemented tests for it about 20 minutes ago | 17:24 |
ghostmansd | but OK :-) | 17:24 |
lkcl | i'm even finding unit tests for it! | 17:24 |
lkcl | i'm going to have to look at that reeaaally carefully | 17:26 |
ghostmansd | > i'm even finding unit tests for it! | 17:27 |
lkcl | there's only one | 17:27 |
ghostmansd | well you could've even found it in binutils lol | 17:27 |
ghostmansd | so, svstep is dropped entirely, right? | 17:28 |
ghostmansd | I'll drop it from pysvp64asm and patches I'm going to submit | 17:28 |
lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/test_caller_setvl.py;h=fe8ffd987c4a120654047942d335bb8e081b0514;hb=a7f3fa7ab2c87d75d0c562eb12d73e01d19095f1#l327 | 17:29 |
lkcl | i don't know yet. | 17:29 |
lkcl | nnope, it has to stay | 17:33 |
lkcl | i know what's going on | 17:33 |
lkcl | it has to stay | 17:33 |
lkcl | i was in the middle of something for DCT/FFT Modes, and hadn't documented it. | 17:33 |
lkcl | sorry about that: it's a necessary instruction. i'll carry on documenting it | 17:34 |
ghostmansd | fuck Luke I just dropped it | 17:36 |
ghostmansd | OK I hope it's in reflog | 17:36 |
lkcl | as long as you've not done "git gc" then yes | 17:39 |
lkcl | there's so many aspects to this, it's mental. i'm annoyed with myself for not documenting the additions to svstep when i made them (about 7 months ago) | 17:52 |
programmerjake | even if you do git gc, iirc by default reflog entries don't expire for 30d | 17:58 |
tplaten | after changing the DQS/data pins for the OrangeCrab as in the merge request from today, I get: Warning: Failed to find a route for arc 2 of net ddrphy_ddr3_0__a__o_fclk. | 18:56 |
tplaten | ERROR: Routing design failed. Most likely some of the pins is still wrong, I'll do a comparision with the schematics | 18:57 |
programmerjake | i'll note it appears you put one half of each diff pair with the other diff pair...does the ecp5 even support that? i'd expect the ecp5 has each diff pair only work on the exact 2 pins lattice specifies, not allowing you to mix and match them | 19:11 |
programmerjake | though i could be mis-interpreting the pin assignments in nmigen-boards | 19:12 |
programmerjake | tplaten: ^ | 19:12 |
programmerjake | e.g. if a,b and c,d are two diff pairs, it appears you tried to use diff pairs a,c and b,d | 19:13 |
cesar | On nmigen, DiffPairs("a,c", "b,d") means a,b is one pair, c,d is the other. | 19:51 |
cesar | The first list are all the positives, the second list is all the negatives. | 19:52 |
cesar | ... respectively. | 19:53 |
tplaten | I interpreted the schematics wrong, and I'm not the only person who did that. | 20:06 |
ghostmansd | lkcl, I've updated the patches, let's see whether there're more iterations needed | 20:46 |
ghostmansd | I must admit it took a long time, since I also re-visited the code and found an option to keep it even shorter. I hope they won't object to the fact I added a new operand flag. This is for operands which take form 1..n instead of 0..n-1 (we have this logic for SVxd, SVxy, SVxz and SVi). | 20:51 |
lkcl | ghostmansd, awesome | 23:38 |
lkcl | new op flag is a good idea i feel, it makes things clear what's going on | 23:38 |
lkcl | if there's a future revision, the actual spec pages start at https://libre-soc.org/openpower/sv | 23:41 |
lkcl | not https://libre-soc.org which is the general wiki/website for the entire project | 23:41 |
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