Friday, 2022-10-07

lkclprogrammerjake, ah brilliant, thx01:37
lkcli thought initially all implicit-RS-behaviour would be consistent and identical across all instructions01:38
lkclturns out it's not.01:38
lkclfft-mul-add-subtract needs to source implicit-RS from *RB*01:38
lkcl(urr...)01:38
programmerjakewell, I designed the bigint instructions with the assumption that it's just like the fft ops...01:39
programmerjakeas you explained previously01:39
lkclunfortunately that would mean they'd need to be implicit-RS-from-*RB*01:39
programmerjakewhere RS=RT+MAXVL or RS=RC01:39
programmerjakewhy not define it to be RS=last-reg-arg rather than RS=RC or RS=RB?01:40
lkclin the FFT ones, RS=RB+1 or RS=RB+MAXVL01:40
programmerjakewait, RB+1?!!01:40
lkclyyep01:40
lkclsigh01:40
lkclsomething like that01:40
programmerjakemagic annoying exceptions...01:41
lkclit's 1:40 am so i'm not entirely "up-and-about-in-code-hunting-and-examining" mode01:41
lkclthe logic is embedded in PowerDecoder201:41
programmerjakewell, as long as all the bigint ops can still use RS=RC (in SVP64 mode) and (in scalar mode) RS=RT+1, I'm happy.01:42
programmerjakego work on it another day :)01:42
lkcl:)01:44
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ghostmansd[m]markos, I found that fmvis/fishmv are not in binutils at all. We only supported fptrans added recently by programmerjake. I remember I had some dances with these in Python, in disassembly, but these are not in binutils yet. Can you raise the task, please? I think I'll support these in a day or two.09:01
ghostmansd[m]binutils lack a lot of other stuff added recently too.09:02
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markossure, will do that09:04
ghostmansd[m]I'm not sure what'd be the exhaustive list, so I'll have to add some code in binutils which prints the supported instructions, then compare it with the output from some script which traverses our stuff.09:05
ghostmansd[m]I'll support fmvis/fishmv first, since these block your work, but actually we have way more instructions missing. Unfortunately these instructions mostly require manual intervention due to the way binutils so these tricks.09:07
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markosghostmansd[m], https://bugs.libre-soc.org/show_bug.cgi?id=94509:29
markosthanks again09:29
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lkclmarkos, ghostmansd[m], am just linking that to as many things as i can find.  it's the first one that we are submitting as an external RFC for example11:47
lkcldaaang that DDOS attack is still ongoing and it's so bad that some routes across the internet are completely overloaded11:50
lkclfrom different countries to the same site is "fine"11:50
lkclsaw this last happen around 2018, i was in shenzhen at the time, *all* internet traffic between europe and the uk had to be routed via a meagre connection through sweden or something like that11:51
lkcli was getting 10-15k/sec11:51
lkclthis is waay worse11:51
ghostmansd[m]lkcl, what do you mean about linking?12:08
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lkclstand-alone bugreports get completely lost, only findable by accident on keyword searches14:47
lkclhttps://bugs.libre-soc.org/show_bug.cgi?id=945 is now linked to14:47
lkcl944 - the OPF ISA RFC ls00214:47
lkcl887 - the implementation in ISACaller that markos did14:48
lkcl650 - the specification page containing all the int <-> fp mv instructions14:48
lkcl939 - cavatools which is where the funding is likely to come from for the addition of these two instructions14:48
lkcl"linked"14:49
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ghostmansdlkcl, https://bugs.libre-soc.org/show_bug.cgi?id=94615:24
ghostmansdmarkos, I've starting to move the fish :-)15:25
* ghostmansd always wants to make some joke about fishmv instruction15:27
ghostmansd[m]lkcl, sorry, I missed the message about linkage. I'll link 946 there too. I left you as assignee, this task will need some intervention on CSV level.15:29
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lkclwell i also would love the other one to be "fli" - float-load-immediate15:58
lkcl"flis" - float-load-immediate-shifted is better, based on "oris"15:58
lkclwhich is "or immediate shifted"15:58
lkclso we have "fli fishmv" or "flis fishmv"15:58
lkcl:)15:58
markoslol, reminded me of FLDSMDFR16:24
markosfor those who like cartoons :)16:24
programmerjakewell, if we're naming consistently, it would be something like flish rather than fishmv, or frlhsi/frlhoswi (fp replace lower half of single with immediate)16:30
programmerjakeor maybe just keep it simple: fli2 -- fp load immediate 2nd-step16:33
programmerjakewhich makes you want fli3 and fli4...16:34
programmerjakefli3: RT <- SINGLE(RT) || imm || [0]*1616:36
programmerjakefli4: RT[48:63] <- imm16:37
programmerjakeso flis; fli2; fli3; fli4 ends up being simply the 4 16-bit quarters of the final fp64 in sequence from msb to lsb16:39
programmerjakeand to do a whole fp64 with ext001 64-bit ops would just be pflis pfli316:41
programmerjakepflis is a whole f32, pfli3 is RT <- SINGLE(RT) || imm[0:31]16:43
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lkclhttps://twitter.com/ppcinstructions/with_replies?lang=en17:23
lkclmficofsr - Move From Is Computer On Fire Status Register17:23
lkcli think it's important to be on that list :)17:23
lkcltwerk - Trap Word Extended and Rotate Keyboard17:24
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programmerjakefli[s234] are serious suggestions...17:24
lkcleieio is already a serious instruction!17:25
programmerjakeyes, but you bringing up joke suggestions immediately after my more serious suggestion makes me feel you're treating it as a joke...17:27
lkclsorry17:31
lkcli'd like to prioritise instruction names that are funny17:31
lkclcorrection17:31
lkcli'd like to *seriously and in all seriousness* prioritise instruction names that are funny17:31
lkclthey are more memorable to people, as mnemonics17:32
programmerjakei'd like to prioritize instruction names that are easier to understand...imho fli2 is quite memorable because it's similar to li17:32
lkclthey also make for better press releases and PR17:32
programmerjakeand it's the second step of loading fp immediates17:33
programmerjakeeven if they're not your favorite, I'd like them mentioned in future revisions of the RFC since others may like them more, and also they have a logical extension to fli3-417:45
programmerjakewhereas extending fishmv to fithmv doesn't make sense (third half?!)17:46
programmerjakealso if people are looking for fp load immediate (as is logical from fp ops and li), flis/fli2-4 show up, fishmv doesn't17:48
ghostmansd[m]Put your hands off my fish!17:52
programmerjakeyour fish smells funny, it has the odor of confusion...17:54
ghostmansd[m]Not until you move it!18:31
lkclcan i bang my head against the keyboard yet?19:01
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lkcltoshywoshy, btw ping mattermost bridge borked19:08
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markosthe only problem I'd have against <ins># -type of instructions is that I *always* have to look at the reference to check which variant does which19:13
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octaviusfli2.... "flee 2" (run away twice as fast)? :D19:28
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lkclhaha19:37
lkclok so the benefit of these instructions unless done as VLE (variable-length-encoding) actually tails off19:38
lkcland Power ISA ain't gonna buy into VLE because it punishes massive-wide multi-issue systems19:38
lkclfor a load-quad you have:19:38
lkclsorry19:38
lkclfor a load-dword-float you have:19:39
lkcl1 32-bit I-Load19:39
lkcl2 32-bit D-Loads19:39
lkclfor a load-immediate-BF16 (fmvis) you have:19:39
lkcl1 32-bit I-Load and THAT IS ALL.  covers a huge range and that's why it's always "better" than a load-dword-float19:39
lkclfor a load-immediate-FP32 (fmvis+fishmv) you have:19:40
lkcl2 32-bit I-Loads and it is STILL better than a load-dword-float19:40
lkclfor a load-immediate-FP64 (fmvis+fishmv+pfishmv) you have:19:41
lkcl4x 32-bit I-Loads because you have fmvis BF16 fishmv FP32 pfishmv extra 32-bit LSBs for the dword19:41
lkclat that point you have reached "sub-par" i.e. are better off using load-dword-float19:42
lkcl*unless* it is considered valuable to not hit D-Cache at all with an FP load19:42
lkclif VLE was permitted you could have:19:43
lkcl1 16+64-bit I-Load19:43
lkcli.e. QTY 2.25 32-bit I-Loads19:44
lkclwhich *would* be better than QTY 1of 32-bit I-Load + QTY 2of 32-bit D-Loads19:44
lkclbut doing so "punishes" high-performance multi-issue RISC systems so badly in length-identification on 16/32/48/64/80-bit boundaries that it's just not worth considering19:45
octaviusIs VLE available on PowerISA? Maybe I just haven't heard you talk about it, but I don't remember seeing it before now. Why even consider it?19:46
lkclbottom line, my feeling is, fmvis+fishmv are definitely worth doing, pfishmv is borderline, and 32-bit extenders for the LSBs aren't worth it19:47
lkcloctavius, it was invented by Motorola (Freescale)19:48
lkclthey were its primary advocates, users, and implementors19:48
lkclall of which was... 10+ years ago19:48
octaviusok19:48
lkclhttps://www.google.com/search?q=power+isa+vle+book&oq=power+isa+vle+book19:49
lkcli think ST Micro may have been interested in it at one point as well19:50
lkclbecause of the reduced executable sizes19:50
lkclhttps://www.st.com/resource/en/user_manual/um0438-variablelength-encoding-vle-extension-programming-interface-manual-stmicroelectronics.pdf19:50
lkclmarkos, you think you'll do AV1 at all?19:57
lkclreason i ask is, if you can even just put in a report about what you did, and why it was difficult, it *might* be enough to e.g. put in an RFP for EUR 1000 or something19:59
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markosI could do that, but it would probably be easier/better to reallocate this 1k to another task21:40
markosI'd dislike putting an RFP for something I didn't complete, not even half-way21:41
lkclwe don't get the leeway to do that - not without NLnet's permission - and this is the worst possible time to ask (about 7 days left)21:47
markosright, ok, I'll give it one last shot over the weekend21:48
markosmaybe I'll pick a simpler function as well, yuv would be super cool to do, but I don't think there is enough time for this21:49
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lkclhey, even if you can extract something that "looks like" the original c function23:23

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