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| octavius | What does "edu" in maddedu stand for? The full name would be something like, Multiply-Add High/Low Doubleword Unsigned | 14:06 |
|---|---|---|
| octavius | maddhldu makes more sense (but I guess a mouthful | 14:07 |
| lkcl | multiply-add extended double unsigned | 14:13 |
| octavius | Just figured it out XD | 14:14 |
| octavius | thanks | 14:14 |
| lkcl | should be in the title itself (because it goes into the Power ISA spec) | 14:14 |
| lkcl | :) | 14:14 |
| octavius | It wasn't in biginteger.mdwn | 14:14 |
| octavius | for the rfc, which version of the powerisa spec do we use, 3.0c or 3.1? In the bigint tex I see v3.0, but in rfc there appendices G and H which only occur in v3.1 | 14:27 |
| octavius | Ah, I guess v3.0 is mentioned because the madd instruction haven't changed since then | 14:29 |
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| octavius | Added first draft ls003, text copied from biginteger.mdwn (svp64 removed). Need to update the opcode allocation (unless EXT04 is still appropriate), as well check over. I'll look at the AV minmax instructions a bit later | 15:56 |
| octavius | https://libre-soc.org/openpower/sv/rfc/ls003/ | 15:56 |
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| lkcl | moo-haa-haa, i got the inner loop of chacha20. | 16:41 |
| lkcl | markos, it works - with suitable elwidth overrides, 32-bit add/xor/rotl32, 4 groups of 32 REMAP indices work perfectly | 16:44 |
| lkcl | https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=4f7218a8e3579cbb96fe254495033765f4d772ab | 16:44 |
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| programmerjake | fixed incorrect statement about maddld: https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=1d9fc37f6239bda658a779c3995606af8af8391f | 20:06 |
| lkcl | brilliant | 20:12 |
| lkcl | octavius, the language of the RFC needs to be more "x is added to y and placed into z" | 20:12 |
| lkcl | the wording of maddld (etc) can be used as a template | 20:12 |
| lkcl | btw we need a bugreport for it | 20:13 |
| lkcl | https://bugs.libre-soc.org/show_bug.cgi?id=944 is for ls002 | 20:13 |
| lkcl | so, maddhd says: | 20:14 |
| lkcl | "The 64-bit operands are (RA), (RB), and (RC). The | 20:14 |
| lkcl | 128-bit product of the operands (RA) and (RB) is | 20:14 |
| lkcl | added to (RC). The high-order 64 bits of the 128-bit | 20:14 |
| lkcl | sum are placed into register RT. | 20:14 |
| lkcl | " | 20:14 |
| lkcl | therefore, we literally cut-and-paste that text | 20:14 |
| lkcl | and | 20:14 |
| lkcl | add | 20:14 |
| lkcl | "The low-order 64-bits of the 128-bit sum are placed into register RC" | 20:15 |
| lkcl | also, you removed the tag | 20:17 |
| lkcl | which ensures that ls003 is missing from this auto-generated page: https://libre-soc.org/openpower/sv/rfc/ | 20:17 |
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