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| ghostmansd | lkcl, regarding Rc and CSV | 18:10 |
|---|---|---|
| ghostmansd | The only incorrect part in this change is Rc handling | 18:10 |
| ghostmansd | Other than that, it is perfectly logical. | 18:11 |
| lkcl | hiya ghostmansd i've calmed down slightly | 18:11 |
| lkcl | logical yes, "Causes absolutely chaos" yes | 18:11 |
| lkcl | the way it works is: | 18:11 |
| lkcl | there isn't actually an Rc=1 instruction nor is there an OE=1 instruction in the Decoder | 18:11 |
| lkcl | (this comes from microwatt's decoder) | 18:12 |
| lkcl | there is only "add" for example | 18:12 |
| ghostmansd | You have examples of specific Rc handling already in CSVs. | 18:12 |
| ghostmansd | We're not the first. | 18:12 |
| lkcl | the microwatt decode1.vhdl contains a column that says "please also look at bit 30 and bit 31" | 18:12 |
| ghostmansd | addic., andi., andis. | 18:12 |
| lkcl | this one is absolutely no different | 18:12 |
| lkcl | yes | 18:12 |
| lkcl | by a *complete coincidence* these two instructions are using the "multi-mapping CSV" option | 18:13 |
| ghostmansd | Here's how I got at this issue | 18:13 |
| ghostmansd | Some context would be better | 18:13 |
| lkcl | the coincidence is deliberately being exploited but it is a coincidence | 18:13 |
| ghostmansd | I switched these into insndb, and found that I have dsld with two XOs: 52 and 53. | 18:14 |
| lkcl | the multi-mapping (multi-matching) of the PowerDecoder "switch/case" statements which happen to be allowed happens by a not-entirely-coincidence to match *exactly* with "Rc=0" and "Rc=1" | 18:14 |
| lkcl | yes | 18:14 |
| lkcl | that's correct. | 18:14 |
| ghostmansd | When we try to match the opcode, we have the list of possible XOs (like with isel). | 18:15 |
| lkcl | the "multi-mapping" we added a couple months back should create... yes. | 18:15 |
| ghostmansd | And the issue is that both dsld and dsld. match the instruction with Rc=1. | 18:15 |
| lkcl | and be merged into one "pattern" (that weird algorithm Macbeth or something) | 18:15 |
| lkcl | yes. | 18:15 |
| lkcl | it is "as if" a binary pattern had been specified, "101100-" | 18:16 |
| ghostmansd | Yep | 18:16 |
| lkcl | where bit 31 - by a not-coincidence - matches with Rc=0/Rc=1. | 18:16 |
| ghostmansd | And, then, since dotted version is matched by either of these, it's only natural to keep these distinct. | 18:16 |
| lkcl | no. | 18:16 |
| lkcl | by the time the matching occurs, it's now falling into exactly the same code-path as "addic/addic." | 18:17 |
| lkcl | the *entire* codepath to deal with Rc=1 would have to be changed in order to support the "natural and obvious" thing that you're suggesting is otherwise perfectly logical | 18:18 |
| ghostmansd | Exactly. | 18:18 |
| lkcl | unfortunately :) | 18:18 |
| ghostmansd | That's why if it fails there, it must be specified the same way. | 18:18 |
| ghostmansd | 12,ALU,OP_ADD,RA,CONST_SI,NONE,RT,NONE,NONE,0,0,ZERO,1,NONE,0,0,0,0,0,0,NONE,0,0,addic,D, | 18:18 |
| ghostmansd | 13,ALU,OP_ADD,RA,CONST_SI,NONE,RT,NONE,CR0,0,0,ZERO,1,NONE,0,0,0,0,0,0,ONE,0,0,addic.,D, | 18:18 |
| lkcl | wait... hang on.... | 18:18 |
| lkcl | let me take a look | 18:18 |
| ghostmansd | openpower/isatables/major.csv | 18:18 |
| * lkcl oink | 18:19 | |
| lkcl | how the hell did that end up there | 18:19 |
| ghostmansd | I should have provided this explanation yesterday, but after several hours of debugging into tests I was so fucking tired I couldn't. | 18:19 |
| lkcl | more to the point, how the hell did it actually *work*?? :) | 18:19 |
| ghostmansd | I don't know how it worked, but it is logical and natural. | 18:20 |
| ghostmansd | Again: these differ only by Rc. | 18:20 |
| lkcl | ok leave it with me for a bit, i need to check it | 18:20 |
| ghostmansd | Since the mask incorporates Rc, the only way to circumvent it is to make Rc field to behave differently. | 18:20 |
| lkcl | rc,lk,sgl pipe,comment,form,CONDITIONS | 18:20 |
| ghostmansd | I fucked up the exact Rc column, though. | 18:20 |
| lkcl | NONE,0,0,addic,D, | 18:20 |
| ghostmansd | Column 21 | 18:21 |
| lkcl | ONE,0,0,addic.,D, | 18:21 |
| lkcl | yep ok i'm with it now. | 18:21 |
| ghostmansd | They differ by NONE/ONE | 18:21 |
| ghostmansd | This is what I did wrong | 18:21 |
| ghostmansd | I specified NONE for both. | 18:21 |
| ghostmansd | (IIRC) | 18:21 |
| lkcl | ok so what's going on is that PowerDecoder has a "hard-coded-Rc-input-from-CSV" option | 18:21 |
| ghostmansd | Yes. | 18:22 |
| lkcl | so it's going "i matched against 0b1100, Rc is hard-coded to zero" | 18:22 |
| lkcl | and | 18:22 |
| ghostmansd | Yes, exactly | 18:22 |
| lkcl | "i matched against 0b1101, Rc is hard-coded to one" | 18:22 |
| lkcl | bleuch :) | 18:22 |
| ghostmansd | Kinda circumventing the limitation in CSV | 18:22 |
| ghostmansd | Had we not grabbed Rc into pattern, we shouldn't had resorted to such tricks | 18:22 |
| ghostmansd | But hey | 18:22 |
| ghostmansd | I'll push the updated version soon | 18:23 |
| ghostmansd | I'm really so fucking sick of tests | 18:23 |
| lkcl | that's something i hadn't even realised was being used. i knew it was there (i wrote and maintain PowerDecoder), but up until now i'd never paid attention to it | 18:23 |
| lkcl | :) | 18:23 |
| lkcl | i know - but they're absolutely critical. without them we're royally screwed | 18:23 |
| ghostmansd | I'm slowly gnaw through disassembly tests | 18:23 |
| ghostmansd | Yeah I know | 18:24 |
| ghostmansd | There's no objections on this part :-) | 18:24 |
| lkcl | :) | 18:24 |
| ghostmansd | Just sharing the butthurt | 18:24 |
| lkcl | ok so... haha | 18:24 |
| lkcl | can i suggest doing the dsld/dsrd change as a separate commit? leave it till later if needed | 18:25 |
| ghostmansd | Yes, it's separate | 18:26 |
| ghostmansd | I'm keeping this in branch yet | 18:26 |
| ghostmansd | Otherwise the repo ends up totally fucked | 18:26 |
| ghostmansd | When I started checking tests pretty everything was broken :-) | 18:26 |
| ghostmansd | Mostly because of my desire to deal with it in one shot | 18:27 |
| ghostmansd | It'd have been almost impossible to do it step-by-step, though, because the whole assembly is replaced | 18:27 |
| ghostmansd | The next giant step would be to drop the tables for "mode" matching | 18:28 |
| ghostmansd | This will be yet another pain in the ass, to be honest, because besides the major table we have we must also adopt all specifiers, too | 18:28 |
| ghostmansd | e.g. "/sat" should also be able to check some file(s) to understand where it can be applied | 18:29 |
| openpowerbot | [mattermost] <lkcl> whoops transferring to mattermost, IRC gone borked | 18:29 |
| ghostmansd | I'm leaving this for latter | 18:29 |
| openpowerbot | [mattermost] <lkcl> it hasn't been implemented - at all | 18:29 |
| openpowerbot | [mattermost] <lkcl> /sat hasn't been implemented in ISACaller - at all. | 18:30 |
| openpowerbot | [mattermost] <lkcl> remember we're still in the process of implementing SVP64 | 18:30 |
| * lkcl pokes libera irc again | 18:34 | |
| lkcl | ah ha, it's back | 18:35 |
| ghostmansd | Well there are many parts we haven't implemented yet properly, but these are in assembler already, and I shouldn't break existing tests for them. Even if all they check is assembly. | 18:50 |
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| ghostmansd | I would be very pissed if someone broke existing tests with the rationale "hey, but you know, it's not fully implemented anyway". | 18:51 |
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