Wednesday, 2023-04-26

programmerjake@lkcl I realized fminmaxs[.] is redundant because fminmax produces the exact same results for f32-in-f64, imho we should remove it, what do you all think? for more details see https://bugs.libre-soc.org/show_bug.cgi?id=1057#c2802:56
programmerjakeso, lkcl, what do you think? should we remove fminmaxs?07:03
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programmerjakegot some inquiries about when we want to work on adding powerpc support to cranelift/wasmtime -- responded: https://github.com/bytecodealliance/wasmtime/issues/1183#issuecomment-152286518307:40
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ghostmansd[m]Hi folks, FYI, I removed few remote branches on openpower-isa which were created by me. These were no longer actual.13:08
ghostmansd[m]There are few more, perhaps we can drop these too.13:08
ghostmansd[m]I consider branches which are 6 months old to be obsolete, to be honest, and don't see any value in keeping these. It'd be great if we could do a small cleanup.13:09
lkclprogrammerjake, yes good catch - wouldn't have occurred to me at all. i removed fminmaxs from ls012 optable.csv13:55
lkclghostmansd[m], sensible.  once merged i mean unless you intend to re-use a branch tag it really can go13:56
lkclprogrammerjake, another crucially-important flag is #ifdef MMA_EXTENSION13:57
lkclthat is *not* a mandatory feature: like VSX it happens to be an optional feature that *IBM's* implementation, called "POWER10", chose to implement13:57
lkclpowerpc64le-unknown-linux-gnu with the "-mpower10" target should enable mma and vsx by default13:58
lkclwith the "-mpower9" target should enable vsx by default13:58
lkcl> "Our processor is not far enough along to run Linux yet."14:00
lkclyes it is14:00
lkclalso worth mentioning that IBM's A2I does not have VSX, nor A2O, and microwatt is v3.0 SFFS compliant, but the VSX support required 50% more FPGA resources for a *small* subset of VSX so they are not adding more14:03
lkclthe EABI for SFFS basically drops back to version 1.4 https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.4.1.txt14:03
lkcland SVP64/SFFS EABI will simply add extra registers r32-127 fp32-127 cr8-127 to the existing ones. job done14:05
lkcl> We will probably start working on the Cranelift backend in a few months,14:06
lkcldon't whatever you do make committments like that without also having a full grant plan to back it up14:06
lkclthe register allocation work you did should have had an *entire EUR 50,000 NLnet Grant* associated with it, just on its own14:07
lkclghostmansd[m], found this14:20
lkclhttps://git.libre-soc.org/?p=binutils-gdb.git;a=blob;f=opcodes/ppc-opc.c;h=2db4f415413ea120483e817f0a8675f3aa3e6c8c;hb=5f4e0b013934af256dff12620886355a8aa3ab3d14:20
lkcl9433 {"fexp2s",      XRC(59,908,0),  X_MASK, SVP64,  PPCVLE, {FRT, FRB}},14:20
lkclSVP64 is a 64-bit prefixing system (actually, a 32-bit instruction saying "do-a-loop-on-the-next-instruction")14:21
lkcland it looks to me like the flag "SVP64" is being used with a different meaning14:21
lkclis that instruction "fexp2s" *really* intended to be *ONLY* accessible as a 64-bit prefixed instruction?14:21
lkclbecause if so that's incorrect14:21
lkclit should be a #define such as "DRAFT_SFFS_EXTENSION" or something like that14:23
lkclbecause those 32-bit instructions are *not* 64-bit SVP64-specific instructions14:23
lkclthey *really* are *really* scalar 32-bit only scalar *really* scalar-only instructions.14:24
lkclwhich happen to be being proposed (as scalar instructions) absolutely nothing to do with SVP64 whatsoever in any way shape or form14:24
ghostmansd[m]lkcl, SVP64 is just a shorthand which gets activated with -mlibresoc14:47
ghostmansd[m]This just means "whenever that flag is active, enable this insn"14:48
ghostmansd[m]But yeah, this is a misnomer. Any ideas for short name for the flag?14:48
ghostmansd[m]Like we have PPCVLE, or POWER10, or like this14:49
lkcl-mdraftsffs15:00
lkclSFFS is the "Scalar Fixed and Floating-Point Subset"15:01
lkclwhich is what these scalar instructions are all being added to15:01
lkclif you wanted to get fancy it could be called "-mdraft_ls012_sffs" and the commits refer to this https://ftp.libre-soc.org/opf_ext_rfc/ls012.pdf15:02
lkclok those were quite easy to find https://bugs.libre-soc.org/show_bug.cgi?id=1068#c215:04
lkclyou'd actually done a hell of a lot already15:07
lkclwhich is awesome15:14
markoslkcl, what is the git for the website? I want to convert the chacha20 doc to mdwn format and make it accessible to the web, probably under the svp64 cookbook umbrella15:18
markosnevermind... :)15:19
markosjust found it, under the bug report :)15:20
markoslkcl, permission denied on libreriscv.git15:32
ghostmansd[m]lkcl, thanks for sorting these out!15:46
ghostmansd[m]I'll finish with removing pr everywhere, and switch to binutils flags15:46
markoslkcl, FATAL: W any libreriscv markos DENIED by fallthru when I try to push16:50
markosunder cookbook/16:51
markosI'm just trying to add chacha20.mdwn there, I'm not (yet) adding another algorithm for the ticket16:52
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ghostmansdlkcl, FYI: https://salsa.debian.org/Kazan-team/mirrors/openpower-isa/-/jobs/416541017:40
ghostmansdAlready fixed this in master17:40
ghostmansdPerhaps we could've generated these from fields.text, but I'm not sure whether Form enum is not order-dependent17:40
lkclmarkos, 1 sec17:51
lkcldone, try again17:52
lkclghostmansd, ah yep it needs adding to the... ok you sorted it17:53
lkcltoshywoshy, one to watch out for17:53
lkclhttps://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=74a1b2ad43661599e3c3810f742149c17e83f54217:53
ghostmansdif this enum does not depend on order, we could simply grab anything we find in fields.text17:53
lkcli'd added these: https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=f817539cbfb4fa73153369ce0f2ed9d1c23fca4617:53
ghostmansdYep, I added CW and CW217:54
lkclghostmansd, mmm.... i kiiinda prefer them to be explicit? it gives the opportunity to add comments (you can see MM=minmax)17:54
ghostmansdyeah fair enough17:54
ghostmansdI also like the explicitness of the enum17:55
lkcland also it's funny but if someone randomly adds something to fields.txt it's kinda good to have the error occur17:55
markoslkcl, thanks17:55
lkclas a sort-of-not-exactly-deliberate double-check17:55
lkclyeah.17:55
markosnow to fix formatting :)17:55
lkclmarkos, looking forward to reading it, i have just added stubs for maxloc, pospopcnt and conflictd17:55
ghostmansdwe should perhaps at least have a better warning, not like "what the heck we lost some key", but rather "hey bruh you lost it in this tiny enum"17:56
ghostmansdthe default Python warning takes a while to understand what's going on17:56
markoslkcl, well it's the same as the txt version so far, need to add the intro to VF mode that you asked, fix formatting and call it 'done' :)17:56
lkclniiice17:57
lkclghostmansd, yes good call17:57
lkclmarkos, and probably "what the heck is indexing" :)17:57
markosthat too17:58
markoshope to be done today17:58
markosplan to work on SVP64 stuff by the end of this week, was too busy with arm stuff lately but that's done now -well the tickets that were overdue at least- so I have some extra time17:59
ghostmansdehem18:02
ghostmansdhave we lost stride?18:02
ghostmansdld/st18:02
ghostmansdf*ck I sure missed a lot :-)18:02
ghostmansdor at least I've completely forgotten that we lost it18:03
ghostmansdrebasing binutils after regenerating the code, and hitting "WTF is stride" issue18:03
lkclelstride is still there, just a little different.18:04
ghostmansdwhat I really like is that, whenever Python code is changed and I have a bravery to generate binutils code, I always end up with "something went wrong" instead of "hey, don't worry, we're separate projects"18:04
lkclwhoopeee!18:05
lkcl:)18:05
lkclhttps://libre-soc.org/openpower/sv/ldst/18:05
lkclbit 4 (MSB0-numbering) of Mode in LDST_Imm18:05
ghostmansdyeah exactly the page I;m looking into :-)18:05
ghostmansdwe used to have separate "stride" mode IIRC18:06
ghostmansdwith SEA, dz and sz18:06
lkclhaving got rid of predicate-result it was possible to bring back some priority to other mode-bits18:06
lkclthat were previously sacrificed/limited18:07
lkclbut still there are far too few Mode bits18:07
ghostmansdaaargh we're lacking PI mode :-(18:07
ghostmansdI'm resorting to simple/sat/ff for now18:08
lkclack18:08
lkclbtw note that PI - post-increment - is a temporary hack that i am hoping will not become permanent.18:08
lkclbut it requires an astounding *forty five* new LD/ST instructions (including the shifted-and-update-post-increment ones)18:09
lkclif that bit is to be removed18:09
ghostmansdyou wrote it exactly when I wanted to ask whether I should raise a task to support it :-)18:09
lkclbtw i deliberately didn't put the LD/ST-post-increment or the LD/ST-shifted instructions on the binutils TODO list18:10
lkclbecause it is an "either/or" situation for "/pi" in SVP64, or those (45) instructions in the *scalar* SFFS subset18:11
lkclLD/ST-with-shift is "EA = (RA) + (RB)<<sm"18:11
lkclno immediate variants involved there (absolutely no point whatsoever, to have an immediate shifted by another immediate)18:12
ghostmansdah, OK, I'll skip this one18:12
ghostmansdeither/or seems kinda hacky already per se18:12
ghostmansdbecause the rest applies everywhere18:12
lkclit's why i didn't put them in the list, not least because there's no room available18:12
ghostmansdor, well, almost18:12
lkcluntil PO9 is approved by the OPF ISA WG as a (new) 64-bit prefix space18:13
lkclhttps://libre-soc.org/openpower/sv/po9_encoding/18:13
ghostmansddamn :-)18:14
ghostmansdanything else I missed?18:14
ghostmansdseems like you guys changed a lot!18:14
ghostmansdwell I kinda vaguely recall EXT00918:14
lkclthere's a critical hard deadline coming up for Simple-V to get into Power ISA RFCs18:15
ghostmansd> including VSX in future18:15
lkclhence i have had to scramble for the past 2 months, there's *15* RFCs now.18:15
lkclyes.18:15
ghostmansdThis frighthens a bit18:15
ghostmansdholy cow18:15
ghostmansd15 RFCs?18:15
ghostmansddid you even get a sleep while I was absent?18:15
lkclit's a massive task, classifying a whopping 750 instructions, so i am going *nowhere near that*18:16
lkclyep.18:16
lkcl5 for Simple-V (ls001 - po9; ls005 - XLEN; ls008-010 for management, format, and REMAP)18:16
lkclthen there's 150 new instructions to propose, where ls012 does an "overview" of them all18:17
lkclif you read any of them and have questions or comments put them on the appropriate bugreport https://bugs.libre-soc.org/show_bug.cgi?id=101218:17
lkcland i have an excuse to throw at least EUR 500 your way18:18
ghostmansdOK, but no sooner than I finish binutils18:18
ghostmansdunlike Caius Iulius Caesar, I'm unable to handle several deeds at once :-)18:19
lkclno problem. if you're going to read them then as long as you demonstrate that (by putting something in the bugtracker) i can put in a budget18:19
lkcl:)18:19
lkclfrickin tell me about it18:19
lkclknowledge of how DCT REMAP works has almost completely gone. sigh18:19
ghostmansddonnerwetter18:37
ghostmansdthat was so long and tiring rebase of binutils18:37
ghostmansdlots of conflicts, the most disgusting was the one where I synced specifiers18:38
ghostmansdsyncing specifiers and later getting rid one of them... sigh18:38
ghostmansdthe code is so literally f*cked that I even moved it to a separate branch, svp64-nopr18:39
ghostmansdnow studying diff between what I had (svp64) and this one18:39
ghostmansdwe really, I stress, _really_ must eventually compare binutils asm/disasm with Python18:40
ghostmansdI think the whole thing is doomed now18:40
ghostmansdI will eventually get to this so that markos can use binutils :-)18:41
ghostmansdmarkos, I promise, I won't let you down :-)18:41
ghostmansdbut it will take some time18:41
ghostmansdI even tried squashing the changes into the original commits, like "support normal mode disassembly"18:43
ghostmansdwhat I like about git is that it makes stuff appear as if it never existed, just if you use force push18:43
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programmerjake<lkcl> "> "Our processor is not far..." <- i said that in 2020, which iirc was accurate then19:40
programmerjake<lkcl> "> We will probably start working..." <- again, i said that in 2020, obviously that didn't happen19:42
programmerjakelkcl: if/when we have some spare mode bits in SVP64, imho we should add parallel prefix sum, like parallel-reduce but produces a whole vector instead of some junk and a scalar20:04
programmerjakeand with /mrr should produce postfix-sum20:06
programmerjakeprefix sum has a whole list of applications: counting sort, radix sort, decoding gray code, and others20:13
programmerjakenm about /mrr, it won't work like that20:22
programmerjakecreated https://bugs.libre-soc.org/show_bug.cgi?id=1071 for parallel prefix sum20:31
lkclwhat's the difference to https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/remap_preduce_yield.py;hb=HEAD ?21:22
programmerjakereplied here: https://bugs.libre-soc.org/show_bug.cgi?id=1071#c321:26
lkclahh i remember those diagrams.21:40
lkclarrrgh i have yet more spec writing to do...21:44
lkclcan you add prefix sum to remap_preduce_yield.py in as sparse/simple/short a fashion as possible?21:45
programmerjakei can help...21:45
lkclit should be dead simple, add an optional loop-set at the end of the iterate function21:46
programmerjakeyeah, though that'll be later today, probably after you're asleep21:46
lkcli explained the options where it'll fit into the available SVSHAPE SPR (submode bits - aka SVSHAPE.skip)21:46
lkclno problem21:46
lkcli can do the twiddly-bits of shoe-horning it in to the infrastructure21:46
programmerjake:)21:47
lkclif you can then do the unit tests in test_caller_svp64_preduce.py in a couple of days?21:47
lkclit's.... dog-awful...21:47
programmerjakeyeah21:47
lkclbits named this but are being used for that21:47
programmerjakecan you add a todo list in the top comment so i don't forget?21:48
lkclit does the job but could really do with the same sort of "XYZ-Form" treatment as the opcodes21:48
lkclsure21:48
lkcland who does what21:48
lkclgimme a mo21:48
lkcleek 10mins till ISA WG meeting21:48
lkcllater21:48
programmerjakettyl21:48
lkclbudget assigned, EUR 200021:48
programmerjake😁21:50
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toshywoshylkcl: don't you mean 1h 10m ?22:04
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